- Add a AnalyzeCallResult specialized for calls which produce a single value. This is used by fastisel.

llvm-svn: 55879

llvm-svn: 55866

llvm-svn: 55865

out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.

llvm-svn: 55863

llvm-svn: 55856

llvm-svn: 55846

llvm-svn: 55845

llvm-svn: 55843

approach here.

llvm-svn: 55842

llvm-svn: 55838

elsewhere due to a missing pattern for
v2f64 = sint_to_fp v2i32.  That is PR2687.

llvm-svn: 55828

llvm-svn: 55824

but less accurate (non-IEEE) code sequences for
certain math library functions.  Add the first of
several such expansions.  Don't worry, if you don't
turn it on it won't affect you.

llvm-svn: 55823

llvm-svn: 55818

in the same block. Fix the entry-block handling to only run at
at the beginning of the entry block, and not any other times.

llvm-svn: 55817

pool loads on X86 in fast isel.  This isn't actually used yet.

llvm-svn: 55814

llvm-svn: 55793

llvm-svn: 55779

llvm-svn: 55769

No functional change (and no FE change to generate them).

llvm-svn: 55753

in FastISel.

llvm-svn: 55748

classes in the llvm namespace having members with types from
anonymous namespaces.

llvm-svn: 55747

HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.

llvm-svn: 55746

llvm-svn: 55704

Fix an issue where we were reusing materializations of constants in blocks not dominated by the materialization.  This is
the simple fix, materializing the constant before every use.  It might be better to either track domination of uses or
to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses.

llvm-svn: 55703

and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.

llvm-svn: 55701

routines and move them into a separate file, ScheduleDAGEmit.cpp.

llvm-svn: 55699

llvm-svn: 55692

llvm-svn: 55668

even in FastISel mode in the case where FastISel successfully 
selects all the instructions. 

llvm-svn: 55641

The first can update the SDNode in an SDValue
while the second is called with SDNode* and
returns a possibly updated SDNode*.

This patch has no intended functional impact,
but helps eliminating ugly temporary SDValues.

llvm-svn: 55608

(what matters is that it is added to the worklist),
it seems more logical to return it.

llvm-svn: 55606

llvm-svn: 55577

llvm-svn: 55576

   // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
   //   (rotl x, y)
   // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
   //   (rotr x, (sub 32, y))

Example: (x == 0xDEADBEEF and y == 4)

    (x << 4) | (x >> 28)
 => 0xEADBEEF0 | 0x0000000D
 => 0xEADBEEFD

    (rotl x, 4)
 => 0xEADBEEFD

    (rotr x, 28)
 => 0xEADBEEFD

- Fix comment and code for second version. It wasn't using the rot* propertly.

   // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> 
   //   (rotr x, y)
   // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
   //   (rotl x, (sub 32, y))

    (x << 28) | (x >> 4)
 => 0xD0000000 | 0x0DEADBEE
 => 0xDDEADBEE

    (rotl x, 4)
 => 0xEADBEEFD

    (rotr x, 28)
 => (0xEADBEEFD)

llvm-svn: 55575

llvm-svn: 55574

llvm-svn: 55571

Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).

llvm-svn: 55558

Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg
assignment when selecting the def.  This is the naive solution to the problem: insert a copy to the pre-chosen
vreg.  Other solutions might be preferable, such as:
  1) Passing the dest reg into FastEmit_.  However, this would require the higher level code to know about reg classes, which they don't currently.
  2) Selecting blocks in reverse postorder.  This has some compile time cost for computing the order, and we'd need to measure its impact.

llvm-svn: 55555

llvm-svn: 55551