Patch by Liang Wang!

llvm-svn: 149085

llvm-svn: 148856

Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.

llvm-svn: 148833

This will interleave the elements from two or more lists.

llvm-svn: 148824

Unfortunately I don't think there's a fix for this that will work upstream and
also satisfy Clang's -Wunreachable-code, which is a pity. But I'll give it some
more thought -perhaps there's some way out.

llvm-svn: 148645

This will ensure LLVM and Clang build -Wswitch-enum-redundant-default (an on-by-default warning I'm about to add to Clang).

llvm-svn: 148639

Problem: LLVM needs more function attributes than currently available (32 bits).
One such proposed attribute is "address_safety", which shows that a function is being checked for address safety (by AddressSanitizer, SAFECode, etc).

Solution:
- extend the Attributes from 32 bits to 64-bits
- wrap the object into a class so that unsigned is never erroneously used instead
- change "unsigned" to "Attributes" throughout the code, including one place in clang.
- the class has no "operator uint64 ()", but it has "uint64_t Raw() " to support packing/unpacking.
- the class has "safe operator bool()" to support the common idiom:  if (Attributes attr = getAttrs()) useAttrs(attr);
- The CTOR from uint64_t is marked explicit, so I had to add a few explicit CTOR calls
- Add the new attribute "address_safety". Doing it in the same commit to check that attributes beyond first 32 bits actually work.
- Some of the functions from the Attribute namespace are worth moving inside the class, but I'd prefer to have it as a separate commit.

Tested:
"make check" on Linux (32-bit and 64-bit) and Mac (10.6)
built/run spec CPU 2006 on Linux with clang -O2.


This change will break clang build in lib/CodeGen/CGCall.cpp.
The following patch will fix it.

llvm-svn: 148553

When set, this bit indicates that a register is completely defined by
the value of its sub-registers.

Use the CoveredBySubRegs property to infer which super-registers are
call-preserved given a list of callee-saved registers.  For example, the
ARM registers D8-D15 are callee-saved.  This now automatically implies
that Q4-Q7 are call-preserved.

Conversely, Win64 callees save XMM6-XMM15, but the corresponding
YMM6-YMM15 registers are not call-preserved because they are not fully
defined by their sub-registers.

llvm-svn: 148363

paths.

llvm-svn: 148362

Targets can now add CalleeSavedRegs defs to their *CallingConv.td file.
TableGen will use this to create a *_SaveList array suitable for
returning from getCalleeSavedRegs() as well as a *_RegMask bit mask
suitable for returning from getCallPreservedMask().

llvm-svn: 148346

llvm-svn: 148316

This lets lldb give sane output for SmallVectors, e.g.
Before:
(lldb) p sv
(llvm::SmallVector<int, 10>) $0 = {
  (llvm::SmallVectorImpl<int>) llvm::SmallVectorImpl<int> = {
    (llvm::SmallVectorTemplateBase<int>) llvm::SmallVectorTemplateBase<int> = {
      (llvm::SmallVectorTemplateCommon<int>) llvm::SmallVectorTemplateCommon<int> = {
        (llvm::SmallVectorBase) llvm::SmallVectorBase = {
          (void *) BeginX = 0x00007fff5fbff960
...
}

After:
(lldb) p sv
(llvm::SmallVector<int, 10>) $0 = {
  (int) [0] = 42
  (int) [1] = 23
...
}

The script is still a bit rough so expect crashes for vectors of complex types.
Synthetic children are _not_ available in xcode 4.2, newer LLDBs should work though.

llvm-svn: 148308

llvm-svn: 148293

llvm-svn: 148284

Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly.

(This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them)

llvm-svn: 148262

llvm-svn: 148147

The code type was always identical to a string anyway. Now it is simply
a synonym. The code literal syntax [{...}] is still valid.

llvm-svn: 148092

llvm-svn: 148067

llvm-svn: 147965

llvm-svn: 147858

llvm-svn: 147855

llvm-svn: 147802

AsmParser holds info specific to target parser.
AsmParserVariant holds info specific to asm variants supported by the target.

llvm-svn: 147787

llvm-svn: 147738

  /// FastEmit_f - This method is called by target-independent code
  /// to request that an instruction with the given type, opcode, and
  /// floating-point immediate operand be emitted.
  virtual unsigned FastEmit_f(MVT VT,
                              MVT RetVT,
                              unsigned Opcode,
                              const ConstantFP *FPImm);

Currently, it emits an accidentally overloaded version without the const on the
ConstantFP*. This doesn't affect anything in the tree, since nothing causes that
method to be autogenerated, but I have been playing with some ARM TableGen
refactorings that hit this problem.

llvm-svn: 147727

Store AsmParser info locally. A small step towards emitting match entries for multiple asm variants.

llvm-svn: 147710

llvm-svn: 147708

useful for test suites which want to piggyback onto the "shtest" format style.

llvm-svn: 147684

llvm-svn: 147583

Patch by Andy Zhang!

llvm-svn: 147491

llvm-svn: 147368

llvm-svn: 147367

rdar://10558523

llvm-svn: 147189

tblgen has been renamed to llvm-tblgen so this command has been failing,
and it's no longer needed because llvm-tblgen is already installed by default.

llvm-svn: 147187

Diagnostics are now emitted via the SourceMgr and we use MemoryBuffer
for buffer management. Switched the code to make use of the trailing
'0' that MemoryBuffer guarantees where it makes sense.

llvm-svn: 147063

llvm-svn: 147025

llvm-svn: 146970

likely to stay either way that discussion ends up resolving itself.

llvm-svn: 146966

Revert pragma clang suppressions that confuse GCC. (I'll worry about how to suppress/fix these problems properly when we figure out how to keep LLVM -Wweak-vtables clean)

llvm-svn: 146965

llvm-svn: 146960