- Nov 11, 2011
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Daniel Dunbar authored
LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler. llvm-svn: 144344
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Jim Grosbach authored
rdar://10429490 llvm-svn: 144338
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Jim Grosbach authored
llvm-svn: 144337
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Jim Grosbach authored
rdar://10130228. llvm-svn: 144331
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Jim Grosbach authored
Was not checking the first register in the register list. llvm-svn: 144329
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- Nov 10, 2011
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Jim Grosbach authored
Get the source register that isn't tied to the destination register correct, even when the assembly source operand order is backwards. rdar://10428630 llvm-svn: 144322
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Daniel Dunbar authored
that depends on MBlazeCodeGen. This is a layering violation that should really be fixed. llvm-svn: 144321
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Chad Rosier authored
For correctness, disable this for now. rdar://10418009 llvm-svn: 144316
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Jim Grosbach authored
Use the getIdentifier() method of the token, not getString(), otherwise we keep the quotes as part of the symbol name, which we don't want. rdar://10428015 llvm-svn: 144315
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Jim Grosbach authored
More of rdar://9704684 llvm-svn: 144301
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Jim Grosbach authored
Start of rdar://9704684 llvm-svn: 144293
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Daniel Dunbar authored
consistency with other targets. llvm-svn: 144292
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Nadav Rotem authored
Note: These patterns only works in some cases because many times the load sd node is bitcasted from a load node of a different type. llvm-svn: 144266
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Chad Rosier authored
determine if the value is negative and flip the sign accordingly. rdar://10422026 llvm-svn: 144258
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Daniel Dunbar authored
options to llvm-build, so the all-targets etc. components are defined properly. llvm-svn: 144255
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Daniel Dunbar authored
handle defining the "magic" target related components (like native, nativecodegen, and engine). - We still require these components to be in the project (currently in lib/Target) so that we have a place to document them and hopefully make it more obvious that they are "magic". llvm-svn: 144253
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Daniel Dunbar authored
change the generated library .a file name once we fully switch over, but simplifies how we treat these targets without requiring more special casing (since their library group name and the codegen library name currently map to the same "llvm-config" style component name). llvm-svn: 144251
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Daniel Dunbar authored
- Gives us a place to hang target specific metadata (like whether the target has a JIT). llvm-svn: 144250
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Jim Grosbach authored
llvm-svn: 144244
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Jim Grosbach authored
rdar://10422955 llvm-svn: 144242
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Eli Friedman authored
llvm-svn: 144241
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- Nov 09, 2011
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Chad Rosier authored
rdar://10418009 llvm-svn: 144213
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Nadav Rotem authored
llvm-svn: 144212
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Devang Patel authored
llvm-svn: 144211
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Nadav Rotem authored
llvm-svn: 144187
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Craig Topper authored
Enable execution dependency fix pass for YMM registers when AVX2 is enabled. Add AVX2 logical operations to list of replaceable instructions. llvm-svn: 144179
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Craig Topper authored
llvm-svn: 144176
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Craig Topper authored
llvm-svn: 144174
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Chad Rosier authored
remove a fair number of unnecessary materialized constants. rdar://10412592 llvm-svn: 144163
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Evan Cheng authored
llvm-svn: 144154
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- Nov 08, 2011
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Bruno Cardoso Lopes authored
Patch by Jack Carter. llvm-svn: 144139
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Evan Cheng authored
llvm-svn: 144123
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Chad Rosier authored
No functional change intended. llvm-svn: 144122
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Lang Hames authored
Add support for trimming constants to GetDemandedBits. This fixes some funky constant generation that occurs when stores are expanded for targets that don't support unaligned stores natively. llvm-svn: 144102
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Pete Cooper authored
When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses llvm-svn: 144100
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Bruno Cardoso Lopes authored
implements unaligned loads and stores with assembler macro-instructions ulw, usw, ulh, ulhu, ush, and this patch emits corresponding instructions instead of these macros. Since each unaligned load/store is expanded into two corresponding loads/stores where offset for second load/store is modified by +3 (for words) or +1 (for halfwords). Patch by Petar Jovanovic and Sasa Stankovic. llvm-svn: 144081
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NAKAMURA Takumi authored
llvm-svn: 144071
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Eli Friedman authored
llvm-svn: 144057
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Evan Cheng authored
Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222 llvm-svn: 144052
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Chad Rosier authored
callee's responsibility to sign or zero-extend the return value. The additional test case just checks to make sure the calls are selected (i.e., -fast-isel-abort doesn't assert). llvm-svn: 144047
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