Commits · 709bda66b9ef65b36fd890bdc6aba78ec5b7553f · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Aug 19, 2013
- [SystemZ] Add support for sibling calls · 709bda66
  Richard Sandiford authored Aug 19, 2013
  709bda66
- Adds missing TLI check for library simplification of · 4bb3f8f2
  Michael Kuperstein authored Aug 19, 2013
  4bb3f8f2
- Add ExpandFloatOp_FCOPYSIGN to handle ppcf128-related expansions · e4eb7818
  Hal Finkel authored Aug 19, 2013
  e4eb7818
- Add the PPC fcpsgn instruction · dbc78e1f
  Hal Finkel authored Aug 19, 2013
  dbc78e1f
- llvm-dwarfdump: Do not include address offsets for attributes, only for tags · 175b0b9a
  David Blaikie authored Aug 19, 2013
  175b0b9a
- DebugInfo: don't emit zero-length names for parameters · 715528be
  David Blaikie authored Aug 19, 2013
  715528be
Aug 18, 2013
- ARM: make sure we keep inline asm operands tied. · 55349a29
  Tim Northover authored Aug 18, 2013
  55349a29
- AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions. · 3ce8dbba
  Elena Demikhovsky authored Aug 18, 2013
  3ce8dbba
Aug 17, 2013
- R600: Expand vector FRINT ops · b249b757
  Tom Stellard authored Aug 16, 2013
  b249b757
- R600: Expand vector FFLOOR ops · ad3aff24
  Tom Stellard authored Aug 16, 2013
  ad3aff24
- R600: Expand vector float operations for both SI and R600 · a92ff879
  Tom Stellard authored Aug 16, 2013
  a92ff879
- ARM: Properly constrain comparison fastisel register classes. · d7866790
  Jim Grosbach authored Aug 16, 2013
  d7866790
- ARM: Fast-isel register class constrain for extends. · 3fa74910
  Jim Grosbach authored Aug 16, 2013
  3fa74910
- ARM: Fix more fast-isel verifier failures. · 06c2a681
  Jim Grosbach authored Aug 16, 2013
  06c2a681
- ARM: Clean up fast-isel machine verifier errors. · d69f3ed9
  Jim Grosbach authored Aug 16, 2013
  d69f3ed9
- Fix a subtle difference between running clang vs llc for mips16. · 0eae85fb
  Reed Kotler authored Aug 16, 2013
  0eae85fb
Aug 16, 2013
- [tests] Another attempt to workaround broken misched-copy.s test on some buildbots. · bc59c77d
  Daniel Dunbar authored Aug 16, 2013
  bc59c77d
- R600/SI: Add pattern for xor of i1 · 8522270d
  Michel Danzer authored Aug 16, 2013
  8522270d
- R600/SI: Fix broken encoding of DS_WRITE_B32 · 20680b1c
  Michel Danzer authored Aug 16, 2013
  20680b1c
- When initializing the PIC global base register on ARM/ELF add pc to fix the address. · 30920666
  Benjamin Kramer authored Aug 16, 2013
  30920666
- Add support for Thumb2 literal loads with negative zero offset · 46c1bcb4
  Mihai Popa authored Aug 16, 2013
  46c1bcb4
- Fix Thumb2 aliasing complementary instructions taking modified immediates · cf276b2c
  Mihai Popa authored Aug 16, 2013
  cf276b2c
- [SystemZ] Use SRST to implement strlen and strnlen · 0dec06a2
  Richard Sandiford authored Aug 16, 2013
  0dec06a2
- [SystemZ] Use MVST to implement strcpy and stpcpy · bb83a50f
  Richard Sandiford authored Aug 16, 2013
  bb83a50f
- [SystemZ] Use CLST to implement strcmp · ca232710
  Richard Sandiford authored Aug 16, 2013
  ca232710
- [SystemZ] Fix handling of 64-bit memcmp results · e3827751
  Richard Sandiford authored Aug 16, 2013
  e3827751
- [SystemZ] Fix sign of integer memcmp result · a5901257
  Richard Sandiford authored Aug 16, 2013
  a5901257
- This patch implements wait instruction for mips. Examples are added in test files. · 2df9ee6e
  Vladimir Medic authored Aug 16, 2013
  2df9ee6e
- Don't use v16i32 for load pattern matching. All 512-bit loads are cated to v8i64. · 8c929627
  Craig Topper authored Aug 16, 2013
  8c929627
- Add missing test for GEP + bitcast transformation · b06951bc
  Matt Arsenault authored Aug 16, 2013
  b06951bc
- [tests] Add a hack to eliminate some dangling .s files on buildbots. · c7581db4
  Daniel Dunbar authored Aug 16, 2013
  c7581db4
- [tests] Remove an out-dated failing test. · f296f313
  Daniel Dunbar authored Aug 16, 2013
  f296f313
- Revert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions" · dba25713
  Tom Stellard authored Aug 16, 2013
  dba25713
- R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions · 82bef57f
  Tom Stellard authored Aug 16, 2013
  82bef57f
- R600: Add support for global vector loads with element types less than 32-bits · b03edeca
  Tom Stellard authored Aug 16, 2013
  b03edeca
- R600: Add support for global vector stores with elements less than 32-bits · fbab827e
  Tom Stellard authored Aug 16, 2013
  fbab827e
- R600: Add support for i16 and i8 global stores · d3ee8c10
  Tom Stellard authored Aug 16, 2013
  d3ee8c10
- R600: Add support for v4i32 stores on Cayman · 6d1379e1
  Tom Stellard authored Aug 16, 2013
  6d1379e1
- R600: Enable folding of inline literals into REQ_SEQUENCE instructions · 16da74c2
  Tom Stellard authored Aug 16, 2013
  16da74c2
- R600: Change the RAT instruction assembly names so they match the docs · ac00f9df
  Tom Stellard authored Aug 16, 2013
  ac00f9df