- May 29, 2009
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Evan Cheng authored
llvm-svn: 72558
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Bill Wendling authored
decoding. Essentially, they both map to the same column in the "opcode extensions for one- and two-byte opcodes" table in the x86 manual. The RawFrm complicates decoding this. Instead, use opcode 0x01, prefix 0x01, and form MRM1r. Then have the code emitter special case these, a la [SML]FENCE. llvm-svn: 72556
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- May 28, 2009
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Evan Cheng authored
llvm-svn: 72535
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Evan Cheng authored
llvm-svn: 72534
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Bill Wendling authored
the Intel manual (screenshot) says it should be 0b11110110 (f6). The existing encoding causes a disassembly conflict with MMX_PAVGBrm, which really should be 0f e0." Patch by Sean Callanan! llvm-svn: 72508
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Evan Cheng authored
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code. e.g. orl $65536, 8(%rax) => orb $1, 10(%rax) Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization. llvm-svn: 72507
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- May 27, 2009
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Eli Friedman authored
llvm-svn: 72494
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Evan Cheng authored
llvm-svn: 72488
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Eli Friedman authored
FP_TO_XINT. Necessary for some cleanups I'm working on. Updated from the previous version (r72431) to fix a bug and make some things a bit clearer. llvm-svn: 72445
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- May 26, 2009
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Daniel Dunbar authored
llvm-svn: 72436
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Stefanus Du Toit authored
- added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and barcelona with appropriate sse3/4a levels - added FeatureSSE4A for amdfam10 processors in X86Subtarget: - added hasSSE4A - updated AutoDetectSubtargetFeatures to detect SSE4A - updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and family 10h as amdfam10 New processor names match those used by gcc. Patch by Paul Redmond! llvm-svn: 72434
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Eli Friedman authored
FP_TO_XINT. Necessary for some cleanups I'm working on. llvm-svn: 72431
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- May 25, 2009
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Chris Lattner authored
even on Core2, not just AMD processors which was a surprise to me. llvm-svn: 72396
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Chris Lattner authored
llvm-svn: 72387
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- May 24, 2009
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Eli Friedman authored
moment. llvm-svn: 72350
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- May 23, 2009
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Anton Korobeynikov authored
llvm-svn: 72335
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Eli Friedman authored
systems instead of attempting to promote them to a 64-bit SINT_TO_FP or FP_TO_SINT. This is in preparation for removing the type legalization code from LegalizeDAG: once type legalization is gone from LegalizeDAG, it won't be able to handle the i64 operand/result correctly. This isn't quite ideal, but I don't think any other operation for any target ends up in this situation, so treating this case specially seems reasonable. llvm-svn: 72324
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- May 20, 2009
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Evan Cheng authored
llvm-svn: 72160
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Evan Cheng authored
llvm-svn: 72154
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- May 18, 2009
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Dale Johannesen authored
llvm-svn: 72045
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Dale Johannesen authored
Some comment cleanup. llvm-svn: 72022
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- May 15, 2009
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Mike Stump authored
llvm-svn: 71813
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Mike Stump authored
llvm-svn: 71812
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- May 13, 2009
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Evan Cheng authored
llvm-svn: 71726
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Bill Wendling authored
booleans. This gives a better indication of what the "addReg()" is doing. Remembering what all of those booleans mean isn't easy, especially if you aren't spending all of your time in that code. I took Jakob's suggestion and made it illegal to pass in "true" for the flag. This should hopefully prevent any unintended misuse of this (by reverting to the old way of using addReg()). llvm-svn: 71722
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- May 12, 2009
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Bill Wendling authored
llvm-svn: 71601
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Evan Cheng authored
llvm-svn: 71582
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Evan Cheng authored
llvm-svn: 71520
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- May 11, 2009
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Dan Gohman authored
address folding. llvm-svn: 71446
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- May 09, 2009
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Duncan Sands authored
will make it more obvious what it represents, and stop it being confused with the StoreSize. llvm-svn: 71349
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- May 08, 2009
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Anton Korobeynikov authored
llvm-svn: 71241
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Chris Lattner authored
need to work a bit to combine things like (x+c1+c2) into x+c3. llvm-svn: 71232
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Evan Cheng authored
Optimize code placement in loop to eliminate unconditional branches or move unconditional branch to the outside of the loop. e.g. /// A: /// ... /// <fallthrough to B> /// /// B: --> loop header /// ... /// jcc <cond> C, [exit] /// /// C: /// ... /// jmp B /// /// ==> /// /// A: /// ... /// jmp B /// /// C: --> new loop header /// ... /// <fallthough to B> /// /// B: /// ... /// jcc <cond> C, [exit] llvm-svn: 71209
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- May 06, 2009
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Dale Johannesen authored
more place. This fixes a bunch of x86-64 JIT regressions. (Introduced when the value of the magic constant changed in 68645. At the time apparently nobody noticed; failures were hidden in 70343-70439 by an unrelated bug, so showed up again as "new" failures in 70440.) llvm-svn: 71106
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- May 05, 2009
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Chris Lattner authored
addrspace(257) -> FS relative on x86. Patch by Zoltan Varga! llvm-svn: 70992
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Evan Cheng authored
Revert part of 70929 that has to do with determining whether a SIB byte is needed. It causes a lot of x86_64 JIT failures. llvm-svn: 70986
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Evan Cheng authored
- Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp Patch by Zoltan Varga. llvm-svn: 70929
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- May 04, 2009
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Dan Gohman authored
llvm-svn: 70902
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- May 01, 2009
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Argyrios Kyrtzidis authored
llvm-svn: 70522
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Argyrios Kyrtzidis authored
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable* -Remove DwarfWriter::getOrCreateSourceID -Make necessary changes for the above (fix callsites, etc.) llvm-svn: 70520
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