llvm-svn: 166852

arguments.

This is rather conservative and should be fixed later to be more aggressive.

llvm-svn: 166851

previous iteration.

llvm-svn: 166850

llvm-svn: 166849

llvm-svn: 166848

can be refactored and used in Sema.

llvm-svn: 166847

LowerFormalArguments in MipsTargetLowering.

No functionality change intended.

llvm-svn: 166846

of vararg functions back to the stack.

llvm-svn: 166844

This method emits nodes for passing byval arguments in registers and stack.
This has the same functionality as existing functions PassByValArg64 and
WriteByValArg which will be deleted later.

llvm-svn: 166843

This method copies byval arguments passed in registers onto the stack and has
the same functionality as existing functions CopyMips64ByValRegs and
ReadByValArg which will be deleted later.

llvm-svn: 166841

arguments and inquire about calling convention information.

llvm-svn: 166840

llvm-svn: 166839

in lldb-169 and later.

llvm-svn: 166838

llvm-svn: 166837

Refactor the VectorTargetTransformInfo interface.

Add getCostXXX calls for different families of opcodes, such as casts, arithmetic, cmp, etc.

Port the LoopVectorizer to the new API.

The LoopVectorizer now finds instructions which will remain uniform after vectorization. It uses this information when calculating the cost of these instructions.

llvm-svn: 166836

Keep the integer_insertelement test case, the new coalescer can handle
this kind of lane insertion without help from pseudo-instructions.

llvm-svn: 166835

llvm-svn: 166834

llvm-svn: 166833

llvm-svn: 166832

llvm-svn: 166830

No functional change.

llvm-svn: 166829

Don't pass it around everywhere as a function argument.

llvm-svn: 166828

llvm-svn: 166827

is at the end of parsed tokens when an error occurs, otherwise we'll hit
an assertion when trying to annotate the decltype tokens.

llvm-svn: 166826

llvm-svn: 166825

doesn't include padding up to the alignment of the record, take this
as a cue that the alignment of the record should (conservatively) be
set to 1. This is similar to other the other cues we use to determine
that the record has a lower alignment, e.g., that the
externally-supplied layout places fields at lower offsets than we
would. Fixes <rdar://problem/12582052>; test case in LLDB.

llvm-svn: 166824

llvm-svn: 166823

llvm-svn: 166822

llvm-svn: 166821

Don't pass it everywhere as an argument.

llvm-svn: 166820

llvm-svn: 166819

llvm-svn: 166818

It is just as easy to use MRI::isReserved() now.

llvm-svn: 166817

Some instructions in ARM require 2 even-odd paired GPRs. This
patch adds support for such register class.

Patch by Weiming Zhao!

llvm-svn: 166816

No functional change.

llvm-svn: 166814

The new coalescer can already do all of this, so there is no need to
duplicate the efforts.

llvm-svn: 166813

added to ensure no extra alignment code is added in the future.

llvm-svn: 166812

flags for __block variable meta-data.

llvm-svn: 166811

It was unmaintained and not much more than a stub. The new DependenceAnalysis
pass is both more general and complete.

llvm-svn: 166810

extern "C", its method definitions must be IRGen'ed
before meta-data for class is generated. Otherwise,
IRGen crashes (to say the least).
// rdar://12581683 

llvm-svn: 166809