work in progress.

llvm-svn: 78132

fork call. This eliminates a need for <iostream>. Also remove
needless fsync calls.

llvm-svn: 78131

llvm-svn: 78130

for ELF to work.  
2) RIP addressing: Use SIB bytes for absolute relocations where RegBase=0, 
IndexReg=0.
3) The JIT can get the real address of cstpools and jmptables during
code emission, fix that for object code emission

llvm-svn: 78129

Add a comment explaining why.

llvm-svn: 78128

address from the reverse mapping, and add a test that this works now.

llvm-svn: 78127

llvm-svn: 78126

llvm-svn: 78125

Begin the process of privatizing the type uniquing tables.  No API changes yet, but there will be in the near future.

llvm-svn: 78122

matches what the comment says, and it avoids spurious BitCast
instructions for Argument values.

llvm-svn: 78121

and 126 if it is not executable.

llvm-svn: 78120

llvm-svn: 78119

llvm-svn: 78118

llvm-svn: 78116

Factor some of the constants+context related code out into a separate header, to make LLVMContextImpl.h
not hideous.  Also, fix some MSVC compile errors.

llvm-svn: 78115

general tree transformation. Also, implement template instantiation
for parameter packs.

In addition, introduce logic to enter the appropriate context for
subexpressions that are not potentially evaluated.

llvm-svn: 78114

llvm-svn: 78113

llvm-svn: 78111

llvm-svn: 78110

For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.

llvm-svn: 78109

llvm-svn: 78108

This fixes PR4528.

llvm-svn: 78107

Imp-def is *not* allowed to redefine a live register.
Imp-use is *not* allowed to use a dead register.

llvm-svn: 78106

llvm-svn: 78105

llvm-svn: 78104

still get "intel syntax" instructions from llc with  
-x86-asm-syntax=intel

llvm-svn: 78103

llvm-svn: 78102

llvm-svn: 78101

llvm-svn: 78100

functions.
 - Fix variant flattening when the variant embeds an operand reference.

 - Ignore instructions which reference an operand multiple times (e.g., "xorb
   $dst, $dst"), and operands which have extra flags (e.g., "$dst:subreg32").

llvm-svn: 78099

distinguish that the result is errno, so it can't use it to provide more
information about the error (it also exposes the numeric value of errno).

llvm-svn: 78098

llvm-svn: 78097

the masm backend.  If anyone cares about masm in the future,
we'll have semantic sections it can hang off of.

llvm-svn: 78096

For an undef operand, MO.getReg() is meaningless and we should not use it.
Undef operands should be skipped entirely.

llvm-svn: 78095

random variables?
  --This line, and those below, will be ignored--

M    lib/CodeGen/CGCXX.cpp

llvm-svn: 78094

When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the
kill flag to the place where the sub-register is killed. This can accidentally
overlap with the use of a sibling sub-register, and we have trouble.

In the test case we have this code:

Live Ins: %R0 %R1 %R2
	%R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
	%R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
	%R1L<def> = EXTRACT_SUBREG %R1<kill>, 1
	%R0L<def> = EXTRACT_SUBREG %R0<kill>, 1
	%R0H<def> = ADD16 %R2H<kill>, %R2L<kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>

subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: eliminated!
subreg: killed here: %R0H<def> = ADD16 %R2H, %R2L, %R2<imp-use,kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>

The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H:

*** Bad machine code: Redefining a live physical register ***
- function:    f
- basic block:  0x18358c0 (#0)
- instruction: %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
Register R2H was defined but already live.

The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating
it completely:

subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: replace by: %R2L<def> = IMPLICIT_DEF %R2<kill>

Note that these IMPLICIT_DEF instructions survive to the asm output. It is
necessary to fix the stack-color-with-reg test case because of that.

llvm-svn: 78093

llvm-svn: 78092

Implicit operands no longer get a free pass: Imp-use requires a live register
and imp-def requires a dead register.

There is also no special rule allowing redefinition of a sub-register when the
super-register is live. The super register must have imp-kill+imp-def operands
instead.

llvm-svn: 78090

The only exception is CC.

llvm-svn: 78089

llvm-svn: 78086