llvm-svn: 174492

llvm-svn: 174491

Use the validateTargetOperandClass() hook to match literal '#0' operands in
InstAlias definitions. Previously this required per-instruction C++ munging of the
operand list, but not is handled as a natural part of the matcher. Much better.

No additional tests are required, as the pre-existing tests for these instructions
exercise the new behaviour as being functionally equivalent to the old.

llvm-svn: 174488

initialization is one of the reasons I consider -werror to be shoddy.

llvm-svn: 174485

llvm-svn: 174483

llvm-svn: 174482

Fix the 'operator==' and 'hasAttributes' queries to take into account
target-dependent attributes.

llvm-svn: 174481

This is useful when parsing an object that references multiple attribute groups.

N.B. If both builders have alignments specified, then they should match!

llvm-svn: 174480

Failure: undefined symbol 'Lline_table_start0'.
Root-cause: we use a symbol subtraction to calculate at_stmt_list, but
the line table entries are not dumped in the assembly.
Fix: use zero instead of a symbol subtraction for Compile Unit 0.

llvm-svn: 174479

llvm-svn: 174473

llvm-svn: 174467

llvm-svn: 174465

llvm-svn: 174463

The stuff we're handing are all enums (Attribute::AttrKind), integers and
strings. Don't convert them to Constants, which is an unnecessary step here. The
rest of the changes are mostly mechanical.

llvm-svn: 174456

pointer in function prologs/epilogs. The opcodes should depend on the
data model (LP64 vs. ILP32) rather than the architecture bit-ness.

llvm-svn: 174446

We generate one line table for each compilation unit in the object file.
Reviewed by Eric and Kevin.

rdar://problem/13067005

llvm-svn: 174445

is a vararg function.

The original code was examining flag OutputArg::IsFixed to determine whether
CC_MipsN_VarArg or CC_MipsN should be called. This is not correct, since this
flag is often set to false when the function being analyzed is a non-variadic
function.

llvm-svn: 174442

llvm-svn: 174438

llvm-svn: 174432

Reapply r174343, with a fix for a scary DAG combine bug where it failed to differentiate between the alignment of the
base point of a load, and the overall alignment of the load.  This caused infinite loops in DAG combine with the
original application of this patch.

ORIGINAL COMMIT LOG:
When the target-independent DAGCombiner inferred a higher alignment for a load,
it would replace the load with one with the higher alignment.  However, it did
not place the new load in the worklist, which prevented later DAG combines in
the same phase (for example, target-specific combines) from ever seeing it.

This patch corrects that oversight, and updates some tests whose output changed
due to slightly different DAGCombine outputs.

llvm-svn: 174431

Found by running instcombine on a fabricated test case for the constant folder.

llvm-svn: 174430

         zext( set[ne,eq,gt,ugt] (...) ) type of dag patterns.

llvm-svn: 174429

This was introduced in r173293.

llvm-svn: 174424

Introduce a helper class that computes the cost of memory access instructions.
No functionality change intended.

llvm-svn: 174422

edge is critical, then split it so we can insert the store.
rdar://13126179

llvm-svn: 174418

All targets are now adding return value registers as implicit uses on
return instructions, and there is no longer a need for the live out
lists.

llvm-svn: 174417

Now that return value registers are return instruction uses, there is no
need for special treatment of return blocks.

llvm-svn: 174416

llvm-svn: 174415

llvm-svn: 174414

llvm-svn: 174413

llvm-svn: 174412

llvm-svn: 174411

llvm-svn: 174410

llvm-svn: 174409

llvm-svn: 174408

llvm-svn: 174407

llvm-svn: 174406

llvm-svn: 174402

Currently, when a fragment is relaxed, its size is modified, but its
offset is not (it gets laid out as a side effect of checking whether
it needs relaxation), then all subsequent fragments are invalidated
because their offsets need to change. When bundling is enabled,
relaxed fragments need to get laid out again, because the increase in
size may push it over a bundle boundary. So instead of only
invalidating subsequent fragments, also invalidate the fragment that
gets relaxed, which causes it to get laid out again.

This patch also fixes some trailing whitespace and fixes the
bundling-related debug output of MCFragments.

llvm-svn: 174401

Something very strange is going on with the output registers in this
target. Its ISelLowering code is inserting dangling CopyToReg nodes,
hoping that those physregs won't get clobbered before the RETURN.

This patch adds the output registers as implicit uses on RETURN
instructions in the custom emission pass. I'd much prefer to have those
CopyToReg nodes glued to the RETURNs, but I don't see how.

llvm-svn: 174400