known-incremented level, because the two concepts can be used
to prove the saftey of a retain+release removal in different
ways.

llvm-svn: 138016

We have to be careful when splitting the landing pad block, because the
landingpad instruction is required to remain as the first non-PHI of an invoke's
unwind edge. To retain this, we split the block into two blocks, moving the
predecessors within the loop to one block and the remaining predecessors to the
other. The landingpad instruction is cloned into the new blocks.

llvm-svn: 138015

SplitLandingPadPredecessors is similar to SplitBlockPredecessors in that it
splits the current block and attaches a set of predecessors to the new basic
block. However, it differs from SplitBlockPredecessors in that it's specifically
designed to handle landing pad blocks.

Two new basic blocks are created: one that is has the vector of predecessors as
its predecessors and one that has the remaining predecessors as its
predecessors. Those two new blocks then receive a cloned copy of the landingpad
instruction from the original block. The landingpad instructions are joined in a
PHI, etc. Like SplitBlockPredecessors, it updates the LLVM IR, AliasAnalysis,
DominatorTree, DominanceFrontier, LoopInfo, and LCCSA analyses.

llvm-svn: 138014

instead of 2. They were already defined this way in their regular
version, but not for the intrinsics versions (*_Int), and that would work
for assembly emission but not for object code, since a MachineOperand
would be missing. This commit fix PR10697.

Also removed the {VSQRT,VRSQRT,VRCP}r_Int forms and match the intrinsic
via INSERT_SUBREG+EXTRACT_SUBREG patterns. The same couldn't be done for
memory versions because sse_load_f32/sse_load_f64 operand need special
handling and don't work like regular "addr" operands.

There are right now 114 "*_Int" and 98 "Int_*" forms! I'm slowly
removing them as I step through, but hope we can get rid of these
someday, they are really annoying :)

llvm-svn: 138012

There is no need to add file as context for subroutine type. The subroutine type does not need any context.

llvm-svn: 138010

add the comments of each declaration follow it, making it easier to read and compare to GCC's result.

llvm-svn: 138009

llvm-svn: 138008

piece of it) that is being passed by value is smaller than a word.

llvm-svn: 138007

llvm-svn: 138006

This patch adds support of NativeClient (*-*-nacl) OS support to LLVM.
It's already supported in autoconf/config.sub.

The motivation for this change is to start upstreaming PNaCl work. The
whole set of patches include llvm backends (i686, x86_64, ARM),
llvm-gcc (probably, would not be upstreamed because it's deprecated)
and clang (the work has been just started, the amount of changes is
going to be low and the most of the work is expected to be done close
to the mainline).

llvm-svn: 138005

STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate.
Found by randomized testing.

llvm-svn: 138003

llvm-svn: 138000

llvm-svn: 137998

Remember to fill in some operands so we can print _something_ coherent even when decoding the CPS instruction soft-fails.

llvm-svn: 137997

Fixes a large class of disassembler crashes found by randomized testing.

llvm-svn: 137995

llvm-svn: 137993

Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.

llvm-svn: 137986

llvm-svn: 137985

from the GNU upstream: git://git.savannah.gnu.org/config.git

1. It eliminates a local LLVM patch for auroraux (because, the
mainline config.sub has already got support of auroraux)
2. It adds several new recognized target cpus and operating systems
(in particular, PNaCl)

llvm-svn: 137984

aren't from an indirect branch need to be dominated by the loop header.

llvm-svn: 137981

function.

llvm-svn: 137979

llvm-svn: 137978

anonymous namespace.

llvm-svn: 137975

llvm-svn: 137974

of debug info.

llvm-svn: 137972

llvm-svn: 137969

llvm-svn: 137968

llvm-svn: 137964

llvm-svn: 137963

Test commit; adding test for invalid LDRD which was part of the patch for r137647 but seemingly didn't get svn add'ed.

llvm-svn: 137960

llvm-svn: 137959

llvm-svn: 137957

llvm-svn: 137956

llvm-svn: 137954

llvm-svn: 137953

llvm-svn: 137949

llvm-svn: 137948

These fixups are handled poorly in general, and should have a single
contiguous range of bits per fixup type, but that's not how they're
currently organized, so for now in complex ones like for blx, we just tell the
emitter it's OK for the fixup to munge any bit it wants.

llvm-svn: 137947

llvm-svn: 137946

llvm-svn: 137943