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  1. Nov 28, 2012
  2. Nov 27, 2012
    • Eric Christopher's avatar
      Attempt to make the comments for dwarf debug look more like · acdcbdb1
      Eric Christopher authored
      the coding standard would like.
      
      llvm-svn: 168737
      acdcbdb1
    • Eric Christopher's avatar
      Reapply section moving, make sure string section is output last. · 95198f50
      Eric Christopher authored
      llvm-svn: 168736
      95198f50
    • Chad Rosier's avatar
      [arm fast-isel] Appease the machine verifier by using the proper register · b4ac423e
      Chad Rosier authored
      classes.  The vast majority of the remaining issues are due to uses of
      invalid registers, which are defined by getRegForValue().  Those will be
      a little more challenging to cleanup.
      rdar://12719844
      
      llvm-svn: 168735
      b4ac423e
    • Chad Rosier's avatar
      0c007580
    • Chad Rosier's avatar
      [arm fast-isel] Appease the machine verifier by using the proper register · 2ec7db09
      Chad Rosier authored
      classes.  Also a bit of cleanup.
      rdar://12719844
      
      llvm-svn: 168728
      2ec7db09
    • Andrew Kaylor's avatar
      Moving SectionMemoryManager into RuntimeDyld and adding unit tests for it. · ab5ba51a
      Andrew Kaylor authored
      The SectionMemoryManager now supports (and requires) applying section-specific page permissions.  Clients using this memory manager must call either MCJIT::finalizeObject() or SectionMemoryManager::applyPermissions() before executing JITed code.
      
      See r168718 for changes from the previous implementation.
      
      llvm-svn: 168721
      ab5ba51a
    • Preston Briggs's avatar
      Modified depends() to recognize that when all levels are "=" and · 5cb8cfae
      Preston Briggs authored
      there's no possible loo-independent dependence, then there's no
      dependence.
      
      Updated all test result appropriately.
      
      llvm-svn: 168719
      5cb8cfae
    • Manman Ren's avatar
      CSE: allow PerformTrivialCoalescing to check copies across basic block · f89406ac
      Manman Ren authored
      boundaries.
      
      Given the following case:
      BB0
        %vreg1<def> = SUBrr %vreg0, %vreg7
        %vreg2<def> = COPY %vreg7
      BB1
        %vreg10<def> = SUBrr %vreg0, %vreg2
      We should be able to CSE between SUBrr in BB0 and SUBrr in BB1.
      
      rdar://12462006
      
      llvm-svn: 168717
      f89406ac
    • Meador Inge's avatar
      instcombine: Don't replace all uses for instructions with no uses · f1bc9e74
      Meador Inge authored
      My commit to migrate the printf simplifiers from the simplify-libcalls
      in r168604 introduced a regression reported by Duncan [1].  The problem
      is that in some cases the library call simplifier can return a new value
      that has no uses and the new value's type is different than the old value's
      type (which is fine because there are no uses).  The specific case that
      triggered the bug looked something like:
      
         declare void @printf(i8*, ...)
         ...
         call void (i8*, ...)* @printf(i8* %fmt)
      
      Which we want to optimized into:
      
         call i32 @putchar(i32 104)
      
      However, the code was attempting to replace all uses of the printf with
      the putchar and the types differ, hence a crash.  This is fixed by *just*
      deleting the original instruction when there are no uses.  The old
      simplify-libcalls pass is already doing something similar.
      
      [1] http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-November/056338.html
      
      llvm-svn: 168716
      f1bc9e74
    • Jakub Staszak's avatar
      Remove duplicated #includes. · 38e2f52e
      Jakub Staszak authored
      llvm-svn: 168712
      38e2f52e
    • Benjamin Kramer's avatar
      SCEV: Even if the latch terminator is foldable we can't deduce the result of... · e20e1242
      Benjamin Kramer authored
      SCEV: Even if the latch terminator is foldable we can't deduce the result of an unrelated condition with it.
      
      Fixes PR14432.
      
      llvm-svn: 168711
      e20e1242
    • Manman Ren's avatar
      X86: do not fold load instructions such as [V]MOVS[S|D] to other instructions · 5b462820
      Manman Ren authored
      when the destination register is wider than the memory load.
      
      These load instructions load from m32 or m64 and set the upper bits to zero,
      while the folded instructions may accept m128.
      
      rdar://12721174
      
      llvm-svn: 168710
      5b462820
    • Bill Schmidt's avatar
      This patch implements medium code model support for 64-bit PowerPC. · 34627e34
      Bill Schmidt authored
      The default for 64-bit PowerPC is small code model, in which TOC entries
      must be addressable using a 16-bit offset from the TOC pointer.  Additionally,
      only TOC entries are addressed via the TOC pointer.
      
      With medium code model, TOC entries and data sections can all be addressed
      via the TOC pointer using a 32-bit offset.  Cooperation with the linker
      allows 16-bit offsets to be used when these are sufficient, reducing the
      number of extra instructions that need to be executed.  Medium code model
      also does not generate explicit TOC entries in ".section toc" for variables
      that are wholly internal to the compilation unit.
      
      Consider a load of an external 4-byte integer.  With small code model, the
      compiler generates:
      
      	ld 3, .LC1@toc(2)
      	lwz 4, 0(3)
      
      	.section	.toc,"aw",@progbits
      .LC1:
      	.tc ei[TC],ei
      
      With medium model, it instead generates:
      
      	addis 3, 2, .LC1@toc@ha
      	ld 3, .LC1@toc@l(3)
      	lwz 4, 0(3)
      
      	.section	.toc,"aw",@progbits
      .LC1:
      	.tc ei[TC],ei
      
      Here .LC1@toc@ha is a relocation requesting the upper 16 bits of the
      32-bit offset of ei's TOC entry from the TOC base pointer.  Similarly,
      .LC1@toc@l is a relocation requesting the lower 16 bits.  Note that if
      the linker determines that ei's TOC entry is within a 16-bit offset of
      the TOC base pointer, it will replace the "addis" with a "nop", and
      replace the "ld" with the identical "ld" instruction from the small
      code model example.
      
      Consider next a load of a function-scope static integer.  For small code
      model, the compiler generates:
      
      	ld 3, .LC1@toc(2)
      	lwz 4, 0(3)
      
      	.section	.toc,"aw",@progbits
      .LC1:
      	.tc test_fn_static.si[TC],test_fn_static.si
      	.type	test_fn_static.si,@object
      	.local	test_fn_static.si
      	.comm	test_fn_static.si,4,4
      
      For medium code model, the compiler generates:
      
      	addis 3, 2, test_fn_static.si@toc@ha
      	addi 3, 3, test_fn_static.si@toc@l
      	lwz 4, 0(3)
      
      	.type	test_fn_static.si,@object
      	.local	test_fn_static.si
      	.comm	test_fn_static.si,4,4
      
      Again, the linker may replace the "addis" with a "nop", calculating only
      a 16-bit offset when this is sufficient.
      
      Note that it would be more efficient for the compiler to generate:
      
      	addis 3, 2, test_fn_static.si@toc@ha
              lwz 4, test_fn_static.si@toc@l(3)
      
      The current patch does not perform this optimization yet.  This will be
      addressed as a peephole optimization in a later patch.
      
      For the moment, the default code model for 64-bit PowerPC will remain the
      small code model.  We plan to eventually change the default to medium code
      model, which matches current upstream GCC behavior.  Note that the different
      code models are ABI-compatible, so code compiled with different models will
      be linked and execute correctly.
      
      I've tested the regression suite and the application/benchmark test suite in
      two ways:  Once with the patch as submitted here, and once with additional
      logic to force medium code model as the default.  The tests all compile
      cleanly, with one exception.  The mandel-2 application test fails due to an
      unrelated ABI compatibility with passing complex numbers.  It just so happens
      that small code model was incredibly lucky, in that temporary values in 
      floating-point registers held the expected values needed by the external
      library routine that was called incorrectly.  My current thought is to correct
      the ABI problems with _Complex before making medium code model the default,
      to avoid introducing this "regression."
      
      Here are a few comments on how the patch works, since the selection code
      can be difficult to follow:
      
      The existing logic for small code model defines three pseudo-instructions:
      LDtoc for most uses, LDtocJTI for jump table addresses, and LDtocCPT for
      constant pool addresses.  These are expanded by SelectCodeCommon().  The
      pseudo-instruction approach doesn't work for medium code model, because
      we need to generate two instructions when we match the same pattern.
      Instead, new logic in PPCDAGToDAGISel::Select() intercepts the TOC_ENTRY
      node for medium code model, and generates an ADDIStocHA followed by either
      a LDtocL or an ADDItocL.  These new node types correspond naturally to
      the sequences described above.
      
      The addis/ld sequence is generated for the following cases:
       * Jump table addresses
       * Function addresses
       * External global variables
       * Tentative definitions of global variables (common linkage)
      
      The addis/addi sequence is generated for the following cases:
       * Constant pool entries
       * File-scope static global variables
       * Function-scope static variables
      
      Expanding to the two-instruction sequences at select time exposes the
      instructions to subsequent optimization, particularly scheduling.
      
      The rest of the processing occurs at assembly time, in
      PPCAsmPrinter::EmitInstruction.  Each of the instructions is converted to
      a "real" PowerPC instruction.  When a TOC entry needs to be created, this
      is done here in the same manner as for the existing LDtoc, LDtocJTI, and
      LDtocCPT pseudo-instructions (I factored out a new routine to handle this).
      
      I had originally thought that if a TOC entry was needed for LDtocL or
      ADDItocL, it would already have been generated for the previous ADDIStocHA.
      However, at higher optimization levels, the ADDIStocHA may appear in a 
      different block, which may be assembled textually following the block
      containing the LDtocL or ADDItocL.  So it is necessary to include the
      possibility of creating a new TOC entry for those two instructions.
      
      Note that for LDtocL, we generate a new form of LD called LDrs.  This
      allows specifying the @toc@l relocation for the offset field of the LD
      instruction (i.e., the offset is replaced by a SymbolLo relocation).
      When the peephole optimization described above is added, we will need
      to do similar things for all immediate-form load and store operations.
      
      The seven "mcm-n.ll" test cases are kept separate because otherwise the
      intermingling of various TOC entries and so forth makes the tests fragile
      and hard to understand.
      
      The above assumes use of an external assembler.  For use of the
      integrated assembler, new relocations are added and used by
      PPCELFObjectWriter.  Testing is done with "mcm-obj.ll", which tests for
      proper generation of the various relocations for the same sequences
      tested with the external assembler.
      
      llvm-svn: 168708
      34627e34
    • Ulrich Weigand's avatar
      Never use .lcomm on platforms where it does not accept an alignment · e5f94058
      Ulrich Weigand authored
      argument.  Instead, use a pair of .local and .comm directives.
      
      This avoids spurious differences between binaries built by the
      integrated assembler vs. those built by the external assembler,
      since the external assembler may impose alignment requirements
      on .lcomm symbols where the integrated assembler does not.
      
      llvm-svn: 168704
      e5f94058
    • Bill Wendling's avatar
      Remove the dependent libraries feature. · ee5984df
      Bill Wendling authored
      The dependent libraries feature was never used and has bit-rotted. Remove it.
      
      llvm-svn: 168694
      ee5984df
    • Dmitry Vyukov's avatar
      tsan: instrument atomic nand operation · a878e743
      Dmitry Vyukov authored
      llvm-svn: 168684
      a878e743
    • Eric Christopher's avatar
      Revert rearrangement of debug info sections to unblock the bots · 6e20a168
      Eric Christopher authored
      and O0 + debug codegen.
      
      llvm-svn: 168680
      6e20a168
    • Preston Briggs's avatar
      Modify depends(Src, Dst, PossiblyLoopIndependent). · 1084fa2e
      Preston Briggs authored
      If the Src and Dst are the same instruction,
      no loop-independent dependence is possible,
      so we force the PossiblyLoopIndependent flag to false.
      
      The test case results are updated appropriately.
      
      llvm-svn: 168678
      1084fa2e
    • Meador Inge's avatar
      instcombine: Migrate sprintf optimizations · 25c9b3b6
      Meador Inge authored
      This patch migrates the sprintf optimizations from the simplify-libcalls
      pass into the instcombine library call simplifier.
      
      llvm-svn: 168677
      25c9b3b6
    • Jakub Staszak's avatar
      Remove unneeded #include. · 8262b885
      Jakub Staszak authored
      llvm-svn: 168670
      8262b885
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