Fix a bug introduced by my previous patch.  With this change, SPEC is now clean with prealloc splitting enabled.

llvm-svn: 59544

llvm-svn: 59542

llvm-svn: 59540

llvm-svn: 59532

SCALAR_TO_VECTOR.  I didn't add the testcase, because
once llc gets past scalar-to-vector it hits a SPU target
lowering bug and explodes.

llvm-svn: 59530

llvm-svn: 59519

when softening FNEG.

llvm-svn: 59513

llvm-svn: 59504

- Use less indentation in coding.
- Shorten description.
- Update comments.
- Move code around

llvm-svn: 59496

llvm-svn: 59489

a SelectionDAG*.

llvm-svn: 59488

Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll
Failed with signal(SIGABRT) at line 1
while running:  llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll |  llc -march=xcore > fneg.ll.tmp1.s
Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913.
0   llc                                 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844
1   libSystem.B.dylib                   0x9217809b _sigtramp + 43
2   ???                                 0xffffffff 0x0 + 4294967295
3   libSystem.B.dylib                   0x921f0ec2 raise + 26
4   libSystem.B.dylib                   0x9220047f abort + 73
5   libSystem.B.dylib                   0x921f2063 __assert_rtn + 101
6   llc                                 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1
make: *** [check] Error 2

llvm-svn: 59487

new CycleBound value. Instead, just update CycleBound on each call.
Also, make ReleasePred and ReleaseSucc methods more consistent accross
the various schedulers.

This also happens to make ScheduleDAGRRList's CycleBound computation
somewhat more interesting, though it still doesn't have any noticeable
effect, because no current targets that use the register-pressure
reduction scheduler provide pipeline models.

llvm-svn: 59475

functions in these two schedulers.

llvm-svn: 59465

patch by Richard Osborne, tweaked and extended by your humble
servant.

llvm-svn: 59464

llvm-svn: 59461

a side-car datastructure

llvm-svn: 59458

for the target. This fixes PR3080.

llvm-svn: 59450

llvm-svn: 59445

llvm-svn: 59432

llvm-svn: 59414

can extract using different indexes for two vectors. Added a few tests
for vector shuffles.

llvm-svn: 59399

use SHUFFLE_VECTOR instead.  If not practical, fall back
to the old scheme of building the split result by hand
using a BUILD_VECTOR.

llvm-svn: 59361

and when loading/storing a widen vector, make sure that they are loaded
and stored in consecutive order.

llvm-svn: 59357

llvm-svn: 59341

llvm-svn: 59340

fairly conservative; it doesn't do alias-analysis queries and it doesn't
attempt to break anti-dependencies.

llvm-svn: 59324

llvm-svn: 59293

before re-inserting them.

llvm-svn: 59281

llvm-svn: 59280

llvm-svn: 59279

llvm-svn: 59278

the current function on its own, rather than relying on the SelectionDAG.

llvm-svn: 59277

to carry a SmallVector of flagged nodes, just calculate the flagged nodes
dynamically when they are needed.

The local-liveness change is due to a trivial scheduling change where
the scheduler arbitrary decision differently.

llvm-svn: 59273

MultiSource/Applications is clean with the prealloc splitter.  Some failures
remain in SPEC.

llvm-svn: 59267

llvm-svn: 59264

for the possibility of scheduling without a SelectionDAG being present.

llvm-svn: 59263

BitVector, instead of manually testing each bit.

llvm-svn: 59246

llvm-svn: 59202

special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.

llvm-svn: 59190