llvm-svn: 149398

This removes implicit assumption about the form of MI coming into regalloc. In particular, it should be independent of ProcessImplicitDefs which will eventually become a standard part of coming out of SSA--unless we simply can eliminate IMPLICIT_DEF completely. Current unit tests expose this once I remove incidental pass ordering restrictions.

This is not a final fix. Just a temporary workaround until I figure out the right way.

llvm-svn: 149360

The register allocators don't currently support adding reserved
registers while they are running.  Extend the MRI API to keep track of
the set of reserved registers when register allocation started.

Target hooks like hasFP() and needsStackRealignment() can look at this
set to avoid reserving more registers during register allocation.

llvm-svn: 147577

generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026

before the clobber so that we copy the value if needed.

Fixes pr11415.

llvm-svn: 145056

llvm-svn: 144696

asm.c:2:7: error: ran out of registers during register allocation
  asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9));
        ^

llvm-svn: 134310

sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021

llvm-svn: 134013

llvm-svn: 133569

There could be more than one DBG_VALUE instructions for variables where all of them have offset based on one register.

llvm-svn: 133560

In particular, don't spill dirty registers only to satisfy a hint. It is
not worth it.

The attached test case provides an example where the fast allocator
would spill a register when other registers are available.

llvm-svn: 132900

When compiling a program with lots of small functions like
483.xalancbmk, this makes RAFast 11% faster.

Add some comments to clarify the difference between unallocatable and
reserved registers. It's quite subtle.

The fast register allocator depends on EFLAGS' not being allocatable on
x86. That way it can completely avoid tracking liveness, and it won't
mind when there are multiple uses of a single def.

llvm-svn: 132514

This saves two virtual function calls and an Allocatable BitVector test,
making RAFast run 2% faster.

llvm-svn: 132471

llvm-svn: 129970

registers for fast allocation a different way. This has us updating
used registers only when we're using that exact register.

Fixes rdar://9207598

llvm-svn: 129711

llvm-svn: 129417

registers for fast allocation.

Fixes rdar://9207598

llvm-svn: 129408

llvm-svn: 129400

llvm-svn: 129334

purpose. Fixes PR9080!

llvm-svn: 124903

These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

llvm-svn: 123155

when no virtual registers have been allocated.

It was only used to resize IndexedMaps, so provide an IndexedMap::resize()
method such that

 Map.grow(MRI.getLastVirtReg());

can be replaced with the simpler

 Map.resize(MRI.getNumVirtRegs());

This works correctly when no virtuals are allocated, and it bypasses the to/from
index conversions.

llvm-svn: 123130

Print virtual registers numbered from 0 instead of the arbitrary
FirstVirtualRegister. The first virtual register is printed as %vreg0.
TRI::NoRegister is printed as %noreg.

llvm-svn: 123107

llvm-svn: 121285

Get rid of static constructors for pass registration.  Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.

llvm-svn: 116820

llvm-svn: 113614

overload UserInInstr. Explicitly check Allocatable. The early exit in the
condition will mean the performance impact of the extra test should be
minimal.

llvm-svn: 113016

llvm-svn: 112728

llvm-svn: 112726

llvm-svn: 112632

llvm-svn: 111744

llvm-svn: 110460

While emitting DBG_VALUE for registers spilled at the end of a block do not use location of MBB->end(). If a block does not have terminator then incoming iterator points to end().

llvm-svn: 110411

llvm-svn: 110410

ID member as the sole unique type identifier.  Clean up APIs related to this change.

llvm-svn: 110396

While spilling live registers at the end of block check whether they are used by DBG_VALUE machine instructions or not. If a spilled register is used by DBG_VALUE machine instruction then insert a new DBG_VALUE machine instruction to encode variable's new location on stack.

llvm-svn: 110235

multiple defs, like t2LDRSB_POST.

The first def could accidentally steal the physreg that the second, tied def was
required to be allocated to.

Now, the tied use-def is treated more like an early clobber, and the physreg is
reserved before allocating the other defs.

This would never be a problem when the tied def was the only def which is the
usual case.

This fixes MallocBench/gs for thumb2 -O0.

llvm-svn: 109715

Do not visit operands of old instruction. Visit all operands of new instruction.

llvm-svn: 108767

TII::isMoveInstr is going tobe completely removed.

llvm-svn: 108507