llvm-svn: 109875

llvm-svn: 109872

check the range of the constant when optimizing a comparison between a
constant and a sign_extend_inreg node.

llvm-svn: 109854

have 4 bits per register in the operand encoding), but have undefined
behavior when the operand value is 13 or 15 (SP and PC, respectively).
The trivial coalescer in linear scan sometimes will merge a copy from
SP into a subsequent instruction which uses the copy, and if that
instruction cannot legally reference SP, we get bad code such as:
  mls r0,r9,r0,sp
instead of:
  mov r2, sp
  mls r0, r9, r0, r2

This patch adds a new register class for use by Thumb2 that excludes
the problematic registers (SP and PC) and is used instead of GPR
for those operands which cannot legally reference PC or SP. The
trivial coalescer explicitly requires that the register class
of the destination for the COPY instruction contain the source
register for the COPY to be considered for coalescing. This prevents
errant instructions like that above.

PR7499

llvm-svn: 109842

llvm-svn: 109813

transformations.

llvm-svn: 109800

integers with mov + vdup.  8003375.  This is
currently disabled by default because LICM will
not hoist a VDUP, so it pessimizes the code if
the construct occurs inside a loop (8248029).

llvm-svn: 109799

PR7745.

llvm-svn: 109788

if CExpr is a ConstantInt.

llvm-svn: 109773

Add intrinsics __builtin_arm_qadd & __builtin_arm_qsub to allow access to the QADD & QSUB instructions.
Behave identically to __qadd & __qsub RealView instruction intrinsics.

llvm-svn: 109770

Plug the remaining MC leaks by giving MCObjectStreamer/MCAsmStreamer ownership of the TargetAsmBackend and the MCCodeEmitter.

llvm-svn: 109767

llvm-svn: 109765

We do sometimes load from a too small stack slot when dealing with x86 arguments
(varargs and smaller-than-32-bit args). It looks like we know what we are doing
in those cases, so I am going to remove the assert instead of artifically
enlarging stack slot sizes.

The assert in storeRegToStackSlot stays in. We don't want to write beyond the
bounds of a stack slot.

llvm-svn: 109764

llvm-svn: 109752

llvm-svn: 109746

llvm-svn: 109745

llvm-svn: 109721

llvm-svn: 109720

angst.

llvm-svn: 109718

 - This works, but won't handle crashes on stack overflow, or signals delivered
   to a thread other than the one that crashed. The latter is particular annoying
   on Darwin, because SIGABRT tends to go to the main thread.

llvm-svn: 109717

multiple defs, like t2LDRSB_POST.

The first def could accidentally steal the physreg that the second, tied def was
required to be allocated to.

Now, the tied use-def is treated more like an early clobber, and the physreg is
reserved before allocating the other defs.

This would never be a problem when the tied def was the only def which is the
usual case.

This fixes MallocBench/gs for thumb2 -O0.

llvm-svn: 109715

extend it to handle the case where multiple RAUWs affect a single
SCEVUnknown.

Add a ScalarEvolution unittest to test for this situation.

llvm-svn: 109705

Pass the queried value by argument rather than in a member, in preparation for supporting PHI translation.

llvm-svn: 109701

ARM mode version of r109693. Remove incorrect substitution pattern for UXTB16. It wrongly assumed the input shift was actually a rotate. rdar://8240138

llvm-svn: 109696

Remove incorrect substitution pattern for UXTB16. It wrongly assumed the input shift was actually a rotate. rdar://8240138

llvm-svn: 109693

llvm-svn: 109691

llvm-svn: 109687

llvm-svn: 109686

Get rid of LVIQuery as a distinct data structure, so that we don't have to initialize a new set of maps on every query.

llvm-svn: 109679

alignment, fixing silent truncation of alignment values.

llvm-svn: 109653

The size of this object isn't used for anything - technically it is of variable
size.

This avoids a false positive from the assert in
X86InstrInfo::loadRegFromStackSlot, and fixes PR7735.

llvm-svn: 109652

the info from the .file directive and makes file and directory tables that
will eventually be put out as part of the dwarf info in the output file.

llvm-svn: 109651

llvm-svn: 109650

llvm-svn: 109649

alloca instructions (constrained by their internal encoding),
and add error checking for it. Fix an instcombine bug which
generated huge alignment values (null is infinitely aligned).
This fixes undefined behavior noticed by John Regehr.

llvm-svn: 109643

llvm-svn: 109608

llvm-svn: 109598

of a std::vector.

llvm-svn: 109597

dereference is theoretically infinite. Put a cap on the computed
alignment to avoid overflow, noticed by John Regehr.

llvm-svn: 109596

to avoid undefined behavior on overflow, noticed by John Regehr.

llvm-svn: 109594