- Mar 15, 2011
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Andrew Trick authored
This function performed acrobatics to prove no-self-wrap, which we now have for free. llvm-svn: 127643
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Johnny Chen authored
register operand was erroneously added. Remove an incorrect assert which triggers the bug. rdar://problem/9131529 llvm-svn: 127642
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Bill Wendling authored
and then go kablooie. The problem was that it was tracking the PHI nodes anew each time into this function. But it didn't need to. And because the recursion didn't know that a PHINode was visited before, it would go ahead and call itself. There is a testcase, but unfortunately it's too big to add. This problem will go away with the EH rewrite. <rdar://problem/8856298> llvm-svn: 127640
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Andrew Trick authored
This needs review. llvm-svn: 127638
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Jim Grosbach authored
Also more cleanly separate the ARM vs. Thumb functionality. Previously, the encoding would be incorrect for some Thumb instructions (the indirect calls). llvm-svn: 127637
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Eric Christopher authored
normal version. Fixes rdar://9123638 llvm-svn: 127636
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Francois Pichet authored
Make llvm::Consumer a class (to remove a MSVC warning since Consumer is later forward declared as a struct) llvm-svn: 127632
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Bill Wendling authored
can. As Nate pointed out, VTBL isn't super performant, but it *has* to be better than this: _shuf: @ BB#0: @ %entry push {r4, r7, lr} add r7, sp, #4 sub sp, #12 mov r4, sp bic r4, r4, #7 mov sp, r4 mov r2, sp vmov d16, r0, r1 orr r0, r2, #6 orr r3, r2, #7 vst1.8 {d16[0]}, [r3] vst1.8 {d16[5]}, [r0] subs r4, r7, #4 orr r0, r2, #5 vst1.8 {d16[4]}, [r0] orr r0, r2, #4 vst1.8 {d16[4]}, [r0] orr r0, r2, #3 vst1.8 {d16[0]}, [r0] orr r0, r2, #2 vst1.8 {d16[2]}, [r0] orr r0, r2, #1 vst1.8 {d16[1]}, [r0] vst1.8 {d16[3]}, [r2] vldr.64 d16, [sp] vmov r0, r1, d16 mov sp, r4 pop {r4, r7, pc} The "illegal" testcase in vext.ll is no longer illegal. <rdar://problem/9078775> llvm-svn: 127630
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- Mar 14, 2011
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John McCall authored
doesn't return, so just go back to using the old runtime function instead of trying to use abort() when __builtin_unreachable (or an equivalent) isn't supported. llvm-svn: 127629
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Renato Golin authored
This patch is a big refactoring of llvm-diff. It doesn't add new features, but it re-organizes the old features, so I can insert the MetadataEngine to use the same infrastructure. llvm-svn: 127627
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Jan Sjödin authored
function. llvm-svn: 127626
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Eric Christopher authored
llvm-svn: 127621
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Jim Grosbach authored
llvm-svn: 127620
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Owen Anderson authored
llvm-svn: 127619
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Jakob Stoklund Olesen authored
Use the opportunity to get rid of the trailing underscore variable names. llvm-svn: 127618
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John McCall authored
where none was before. Just don't declare it and hope it's declared in every translation unit that needs it. llvm-svn: 127612
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John McCall authored
llvm-svn: 127610
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John McCall authored
builds, which was the apparent consensus of PR8973 and llvmdev. llvm-svn: 127608
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Jakob Stoklund Olesen authored
Remove the unused reserved_ bit vector, no functional change intended. This doesn't break 'svn blame', this file really is all my fault. llvm-svn: 127607
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Jim Grosbach authored
llvm-svn: 127601
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Evan Cheng authored
llvm-svn: 127600
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Evan Cheng authored
llvm-svn: 127598
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Evan Cheng authored
llvm-svn: 127595
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Andrew Trick authored
llvm-svn: 127593
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Jim Grosbach authored
llvm-svn: 127592
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Andrew Trick authored
llvm-svn: 127591
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Andrew Trick authored
properties. Added the self-wrap flag for SCEV::AddRecExpr. A slew of temporary FIXMEs indicate the intention of the no-self-wrap flag without changing behavior in this revision. llvm-svn: 127590
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Andrew Trick authored
llvm-svn: 127589
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Justin Holewinski authored
- Emit all arrays as type .b8 and proper sizes in bytes to conform to the output of nvcc llvm-svn: 127584
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Justin Holewinski authored
llvm-svn: 127578
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Che-Liang Chiou authored
llvm-svn: 127577
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Mikhail Glushenkov authored
llvm-svn: 127576
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Francois Pichet authored
llvm-svn: 127575
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Jin-Gu Kang authored
Early CSE pass so this patch reverts it to original source code. llvm-svn: 127574
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- Mar 13, 2011
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Che-Liang Chiou authored
llvm-svn: 127569
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Jin-Gu Kang authored
load and store reference same memory location, the memory location is represented by getelementptr with two uses (load and store) and the getelementptr's base is alloca with single use. At this point, instructions from alloca to store can be removed. (this pattern is generated when bitfield is accessed.) For example, %u = alloca %struct.test, align 4 ; [#uses=1] %0 = getelementptr inbounds %struct.test* %u, i32 0, i32 0;[#uses=2] %1 = load i8* %0, align 4 ; [#uses=1] %2 = and i8 %1, -16 ; [#uses=1] %3 = or i8 %2, 5 ; [#uses=1] store i8 %3, i8* %0, align 4 llvm-svn: 127565
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Oscar Fuentes authored
llvm-svn: 127562
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Jakob Stoklund Olesen authored
Use the virtual register number as a cache tag instead. They are not reused. llvm-svn: 127561
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Jakob Stoklund Olesen authored
This allows the allocator to free any resources used by the virtual register, including physical register assignments. llvm-svn: 127560
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- Mar 12, 2011
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Oscar Fuentes authored
llvm-svn: 127555
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