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  1. Sep 16, 2008
    • Dan Gohman's avatar
      Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls · 050d7835
      Dan Gohman authored
      are not enabled. Instead just omit the tail call flag when calls are
      created.
      
      llvm-svn: 56235
      050d7835
    • Dan Gohman's avatar
      Re-enables the new vector select in the bitcode reader, by modifying the · c5d2892e
      Dan Gohman authored
      bitcode reader/writer as follows:
      
      - add and use new bitcode FUNC_CODE_INST_VSELECT to handle the llvm
      select opcode using either i1 or [N x i1] as the selector.
      - retain old BITCODE FUNC_CODE_INST_SELECT in the bitcode reader to
      handle select on i1 for backwards compatibility with existing bitcode
      files.
      - re-enable the vector-select.ll test program.
      
      Also, rename the recently added bitcode opcode FUNC_CODE_INST_VCMP to
      FUNC_CODE_INST_CMP2 and make the bitcode writer use it to handle
      fcmp/icmp on scalars or vectors. In the bitcode writer, use
      FUNC_CODE_INST_CMP for vfcmp/vicmp only. In the bitcode reader, have
      FUNC_CODE_INST_CMP handle icmp/fcmp returning bool, for backwards
      compatibility with existing bitcode files.
      
      Patch by Preston Gurd!
      
      llvm-svn: 56233
      c5d2892e
    • Dan Gohman's avatar
      Teach ScalarEvolution to consider loop preheaders in the search for · f9081a2c
      Dan Gohman authored
      an if statement that guards a loop, to allow indvars to avoid smax
      operations in more situations.
      
      llvm-svn: 56232
      f9081a2c
    • Owen Anderson's avatar
      Live intervals for live-in registers should begin at the beginning of a basic... · 82ab1e72
      Owen Anderson authored
      Live intervals for live-in registers should begin at the beginning of a basic block, not at the first
      instruction.  Also, their valno's should have an unknown def.  This has no effect currently, but was
      causing issues when StrongPHIElimination was enabled.
      
      llvm-svn: 56231
      82ab1e72
  2. Sep 15, 2008
  3. Sep 14, 2008
  4. Sep 13, 2008
  5. Sep 12, 2008
    • Evan Cheng's avatar
      On some targets, non-move instructions can become move instructions because of coalescing. e.g. · 3c12fc43
      Evan Cheng authored
      vr2 = OR vr0, vr1
      =>
      vr2 = OR vr1, vr1   // after coalescing vr0 with vr1
      
      Update the value# of the destination register with the copy instruction if that happens.
      
      llvm-svn: 56165
      3c12fc43
    • Dan Gohman's avatar
      Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and · ec270fb6
      Dan Gohman authored
      ConstantFP* instead of APInt and APFloat directly.
      
      This reduces the amount of time to create ConstantSDNode
      and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
      respectively are already available, as is the case in
      SelectionDAGBuild.cpp. Also, it reduces the amount of time
      to legalize constants into constant pools, and the amount of
      time to add ConstantFP operands to MachineInstrs, due to
      eliminating ConstantInt::get and ConstantFP::get calls.
      
      It increases the amount of work needed to create new constants
      in cases where the client doesn't already have a ConstantInt*
      or ConstantFP*, such as legalize expanding 64-bit integer constants
      to 32-bit constants. And it adds a layer of indirection for the
      accessor methods. But these appear to be outweight by the benefits
      in most cases.
      
      It will also make it easier to make ConstantSDNode and
      ConstantFPNode more consistent with ConstantInt and ConstantFP.
      
      llvm-svn: 56162
      ec270fb6
    • Dale Johannesen's avatar
      Pass "earlyclobber" bit through to machine · 1f3ab868
      Dale Johannesen authored
      representation; coalescer and RA need to know
      about it.  No functional change.
      
      llvm-svn: 56161
      1f3ab868
    • Dan Gohman's avatar
      Rename ConstantSDNode::getValue to getZExtValue, for consistency · effb8944
      Dan Gohman authored
      with ConstantInt. This led to fixing a bug in TargetLowering.cpp
      using getValue instead of getAPIntValue.
      
      llvm-svn: 56159
      effb8944
    • Duncan Sands's avatar
      Rather than marking all internal globals "Ref" · 06dbb126
      Duncan Sands authored
      when a readonly declaration is called, set a
      flag.  This is faster and uses less memory.
      In theory it is less accurate, because before
      only those internal globals that were read
      by someone were being marked "Ref", but now
      all are.  But in practice, thanks to other
      passes, all internal globals of the kind
      considered here will be both read and stored
      to: those only read will have been turned
      into constants, and those only stored to will
      have been deleted.
      
      llvm-svn: 56143
      06dbb126
    • Dale Johannesen's avatar
      The sequence for ppcf128 compares was not IEEE · baf6762e
      Dale Johannesen authored
      safe in the presence of NaNs.
      
      llvm-svn: 56136
      baf6762e
    • Dan Gohman's avatar
      On 64-bit targets, change 32-bit getelementptr indices to be 64-bit · eff71f29
      Dan Gohman authored
      getelementptr indices, inserting an explicit cast if necessary.
      This helps expose the sign-extension operation to other optimizations.
      
      llvm-svn: 56133
      eff71f29
    • Dan Gohman's avatar
      Fix a vectorshuffle instcombine bug introduced by r55995. · 7d01c065
      Dan Gohman authored
      Patch by Nicolas Capens!
      
      llvm-svn: 56129
      7d01c065
  6. Sep 11, 2008
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