Commits · aa10f050447d2ed90ba8180b744e890d58237e93 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Jun 20, 2019
- [CodeGen] Fix formatting and comments (NFC) · aa10f050
  Evandro Menezes authored Jun 20, 2019
  aa10f050
- [AMDGPU] gfx10 tests. NFC. · e917b3b4
  Stanislav Mekhanoshin authored Jun 20, 2019
  e917b3b4
- AMDGPU: Treat undef as an inline immediate · b7f87c0e
  Matt Arsenault authored Jun 20, 2019
  b7f87c0e
- AMDGPU: Make test functions hidden · fcce5317
  Matt Arsenault authored Jun 20, 2019
  fcce5317
- [AMDGPU] gfx1010 core wave32 changes · 0846c125
  Stanislav Mekhanoshin authored Jun 20, 2019
  0846c125
- [DAGCombiner] Support (shl (zext (srl x, C)), C) -> (zext (shl (srl x, C), C)) non-uniform folds. · 1d809324
  Simon Pilgrim authored Jun 20, 2019
  1d809324
- [MIPS GlobalISel] Select integer to floating point conversions · 153bd24e
  Petar Avramovic authored Jun 20, 2019
  153bd24e
- [MIPS GlobalISel] Select floating point to integer conversions · 4b4dae1c
  Petar Avramovic authored Jun 20, 2019
  4b4dae1c
- [X86] Add test cases showing missed opportunities to use the C flag from the... · 3ba20e94
  Craig Topper authored Jun 20, 2019
  3ba20e94
- AMDGPU: Don't clobber VCC in MUBUF addr64 emulation · c67c484f
  Matt Arsenault authored Jun 20, 2019
  c67c484f
- [llvm-objdump] Switch between ARM/Thumb based on mapping symbols. · d88e28d1
  Eli Friedman authored Jun 20, 2019
  d88e28d1
- AMDGPU: Undo sub x, c canonicalization for v2i16 · e24b34e9
  Matt Arsenault authored Jun 19, 2019
  e24b34e9
- AMDGPU: Add baseline test for vector sub x, c canonicalization · 532be255
  Matt Arsenault authored Jun 19, 2019
  532be255
Jun 19, 2019
- AMDGPU: Fix folding immediate into readfirstlane through reg_sequence · 4d000d24
  Matt Arsenault authored Jun 19, 2019
  4d000d24
- hwasan: Shrink outlined checks by 1 instruction. · 2742eeb7
  Peter Collingbourne authored Jun 19, 2019
  2742eeb7
- Reapply "AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics" · 4d55d024
  Matt Arsenault authored Jun 19, 2019
  4d55d024
- [x86] avoid vector load narrowing with extracted store uses (PR42305) · b5640b6f
  Sanjay Patel authored Jun 19, 2019
  b5640b6f
- [x86] add test for unaligned 32-byte load/store splitting; NFC · 33ef687d
  Sanjay Patel authored Jun 19, 2019
  33ef687d
- [TargetLowering] SimplifyDemandedBits ZERO_EXTEND_VECTOR_INREG -> ANY_EXTEND_VECTOR_INREG · 6016fb72
  Simon Pilgrim authored Jun 19, 2019
  6016fb72
- [X86][SSE] Combine shuffles to ANY_EXTEND/ANY_EXTEND_VECTOR_INREG. · 34279db3
  Simon Pilgrim authored Jun 19, 2019
  34279db3
- [AArch64] Improve jump tables testing (NFC) · a7ed3a62
  Evandro Menezes authored Jun 19, 2019
  a7ed3a62
- [AArch64] Improve jump tables testing (NFC) · 54252b82
  Evandro Menezes authored Jun 19, 2019
  54252b82
- [SystemZ] Support vector load/store alignment hints · 3641b10f
  Ulrich Weigand authored Jun 19, 2019
  3641b10f
- [TargetLowering] SimplifyDemandedBits SIGN_EXTEND_VECTOR_INREG -> ANY/ZERO_EXTEND_VECTOR_INREG · c3994f77
  Simon Pilgrim authored Jun 19, 2019
  c3994f77
- Revert rL363678 : AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics · 128ce93c
  Simon Pilgrim authored Jun 19, 2019
  128ce93c
- [DAGCombiner] Support (shl (ext (shl x, c1)), c2) -> (shl (ext x), (add c1, c2)) non-uniform folds. · 9eed5d2f
  Simon Pilgrim authored Jun 19, 2019
  9eed5d2f
- [DAGCombiner] Support (shl (ext (shl x, c1)), c2) -> 0 non-uniform folds. · 8c49366c
  Simon Pilgrim authored Jun 19, 2019
  8c49366c
- [X86] Add non-uniform (shl (ext (shl x, c1)), c2) -> (shl (ext x), (add c1, c2)) test · 85f70baa
  Simon Pilgrim authored Jun 19, 2019
  85f70baa
- [DAGCombine] Fix (shl (ext (shl x, c1)), c2) -> (shl (ext x), (add c1, c2)) comment. NFCI. · d954a536
  Simon Pilgrim authored Jun 19, 2019
  d954a536
- [RISCV] Add lowering of global TLS addresses · 39263ac5
  Lewis Revill authored Jun 19, 2019
  39263ac5
- [RISCV] Fix test after r363757 · ec4e0809
  Alex Bradbury authored Jun 19, 2019
  ec4e0809
- Rename ExpandISelPseudo->FinalizeISel, delay register reservation · 9cac4e6d
  Matt Arsenault authored Jun 19, 2019
  9cac4e6d
- [WebAssembly] Optimize ISel for SIMD Boolean reductions · 18857474
  Thomas Lively authored Jun 19, 2019
  18857474
- [test] Change comment wording (NFC) · 1933cbe8
  Evandro Menezes authored Jun 18, 2019
  1933cbe8
Jun 18, 2019
- [ARM] Comply with rules on ARMv8-A thumb mode partial deprecation of IT. · d16779a7
  Huihui Zhang authored Jun 18, 2019
  d16779a7
- [RISCV] Prevent re-ordering some adds after shifts · 9f155bc6
  Sam Elliott authored Jun 18, 2019
  9f155bc6
- [x86] add another test for load splitting with extracted stores (PR42305); NFC · 413ed69b
  Sanjay Patel authored Jun 18, 2019
  413ed69b
- [x86] add test for load splitting with extracted store (PR42305); NFC · 223176f5
  Sanjay Patel authored Jun 18, 2019
  223176f5
- [TargetLowering] SimplifyDemandedVectorElts - support MUL and ANY_EXTEND_VECTOR_INREG · 9aa25be1
  Simon Pilgrim authored Jun 18, 2019
  9aa25be1
- [X86][AVX] extract_subvector(any_extend(x)) -> any_extend_vector_inreg(x) · 9c859393
  Simon Pilgrim authored Jun 18, 2019
  9c859393