llvm-svn: 23606

large basic blocks because it was purely recursive.  This switches it to an
iterative/recursive hybrid.

llvm-svn: 23596

llvm-svn: 23595

up between defs and uses.

llvm-svn: 23590

destination vreg.

llvm-svn: 23586

For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0

llvm-svn: 23580

llvm-svn: 23579

llvm-svn: 23575

llvm-svn: 23574

2. Printing node groups when displaying nodes.

llvm-svn: 23573

2. Added node groups to handle flagged nodes.

3. Started weaning simple scheduling off existing emitter.

llvm-svn: 23566

llvm-svn: 23559

class into the spill/reload methods.  Targets can now rely on that argument.

llvm-svn: 23556

code.  PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.

llvm-svn: 23536

llvm-svn: 23522

llvm-svn: 23516

Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.

llvm-svn: 23504

If the target prefers it, use _setjmp/_longjmp should be used instead of setjmp/longjmp for llvm.setjmp/llvm.longjmp.

llvm-svn: 23481

llvm-svn: 23469

for testing and will require target machine info to do a proper scheduling.
The simple scheduler can be turned on using -sched=simple (defaults
to -sched=none)

llvm-svn: 23455

This happens all the time on PPC for bool values, e.g. eliminating a xori
in inverted-bool-compares.ll.

This should be added to the dag combiner as well.

llvm-svn: 23403

llvm-svn: 23400

select_cc bits and then wrap it in a convenience function for  use with
regular select.

llvm-svn: 23389

when possible, avoiding the load (and avoiding the copy if the value is already
in the right register).

This patch came about when I noticed code like the following being generated:

  store R17 -> [SS1]
  ...blah...
  R4 = load [SS1]

This was causing an LSU reject on the G5.  This problem was due to the register
allocator folding spill code into a reg-reg copy (producing the load), which
prevented the spiller from being able to rewrite the load into a copy, despite
the fact that the value was already available in a register.  In the case
above, we now rip out the R4 load and replace it with a R4 = R17 copy.

This speeds up several programs on X86 (which spills a lot :) ), e.g.
smg2k from 22.39->20.60s, povray from 12.93->12.66s, 168.wupwise from
68.54->53.83s (!), 197.parser from 7.33->6.62s (!), etc.  This may have a larger
impact in some cases on the G5 (by avoiding LSU rejects), though it probably
won't trigger as often (less spilling in general).

Targets that implement folding of loads/stores into copies should implement
the isLoadFromStackSlot hook to get this.

llvm-svn: 23388

llvm-svn: 23371

into particular vregs, emit copies into the entry MBB.

llvm-svn: 23331

when storing to an 8-bit memory location), as most don't.

llvm-svn: 23303

llvm-svn: 23302

select (x < y), 1, 0 -> (x < y) incorrectly: the setcc returns i1 but the
select returned i32.  Add the zero extend as needed.

llvm-svn: 23301

llvm-svn: 23300

are, simplify logic, and cause things to not be nested as deeply.  This also
uses MRI->areAliases instead of an explicit loop.

No functionality change, just code cleanup.

llvm-svn: 23296

as setcc and select next.

llvm-svn: 23295

llvm-svn: 23294

only add a reload live range once for the instruction.  This is one step
towards fixing a regalloc pessimization that Nate notice, but is later undone
by the spiller (so no code is changed).

llvm-svn: 23293

llvm-svn: 23278

as well as fixing how we replace old values with new values.

llvm-svn: 23260

preserve livevar

llvm-svn: 23259

This restores all of stanford to being identical with and without the dag
combiner with the add folding turned off in sd.cpp.

llvm-svn: 23258

we were losing a node, causing an assertion to fail.  Now we eagerly delete
discovered CSE's, and provide an optional vector to keep track of these
discovered equivalences.

llvm-svn: 23255

that option for PowerPC's beta.

llvm-svn: 23253