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  1. Nov 08, 2013
  2. Sep 25, 2013
    • Quentin Colombet's avatar
      [PR16882] Ignore noreturn definitions when setting isPhysRegUsed. · fa403ab3
      Quentin Colombet authored
      PEI inserts a save/restore sequence for the link register, according to the
      information it gets from the MachineRegisterInfo.
      MachineRegisterInfo is populated by the VirtRegMap pass.
      This pass was not aware of noreturn calls and was registering the definitions of
      these calls the same way as regular operations.
      
      Modify VirtRegPass so that it does not set the isPhysRegUsed information for
      registers only defined by noreturn calls.
      The rational is that a noreturn call is the "last instruction" of the program
      (if it returns the behavior is undefined), so everything that is defined by it
      cannot be used and will not interfere with anything else. Therefore, it is
      pointless to account for then.
      
      llvm-svn: 191349
      fa403ab3
  3. Dec 04, 2012
  4. Dec 03, 2012
    • Chandler Carruth's avatar
      Use the new script to sort the includes of every file under lib. · ed0881b2
      Chandler Carruth authored
      Sooooo many of these had incorrect or strange main module includes.
      I have manually inspected all of these, and fixed the main module
      include to be the nearest plausible thing I could find. If you own or
      care about any of these source files, I encourage you to take some time
      and check that these edits were sensible. I can't have broken anything
      (I strictly added headers, and reordered them, never removed), but they
      may not be the headers you'd really like to identify as containing the
      API being implemented.
      
      Many forward declarations and missing includes were added to a header
      files to allow them to parse cleanly when included first. The main
      module rule does in fact have its merits. =]
      
      llvm-svn: 169131
      ed0881b2
  5. Nov 28, 2012
    • Jakob Stoklund Olesen's avatar
      Make the LiveRegMatrix analysis available to targets. · 26c9d70d
      Jakob Stoklund Olesen authored
      No functional change, just moved header files.
      
      Targets can inject custom passes between register allocation and
      rewriting. This makes it possible to tweak the register allocation
      before rewriting, using the full global interference checking available
      from LiveRegMatrix.
      
      llvm-svn: 168806
      26c9d70d
  6. Oct 15, 2012
  7. Sep 21, 2012
  8. Sep 12, 2012
  9. Sep 06, 2012
  10. Aug 22, 2012
  11. Jun 09, 2012
    • Jakob Stoklund Olesen's avatar
      Also compute MBB live-in lists in the new rewriter pass. · be336295
      Jakob Stoklund Olesen authored
      This deduplicates some code from the optimizing register allocators, and
      it means that it is now possible to change the register allocators'
      solutions simply by editing the VirtRegMap between the register
      allocator pass and the rewriter.
      
      llvm-svn: 158249
      be336295
    • Jakob Stoklund Olesen's avatar
      Reintroduce VirtRegRewriter. · 1224312f
      Jakob Stoklund Olesen authored
      OK, not really. We don't want to reintroduce the old rewriter hacks.
      
      This patch extracts virtual register rewriting as a separate pass that
      runs after the register allocator. This is possible now that
      CodeGen/Passes.cpp can configure the full optimizing register allocator
      pipeline.
      
      The rewriter pass uses register assignments in VirtRegMap to rewrite
      virtual registers to physical registers, and it inserts kill flags based
      on live intervals.
      
      These finalization steps are the same for the optimizing register
      allocators: RABasic, RAGreedy, and PBQP.
      
      llvm-svn: 158244
      1224312f
  12. Feb 17, 2012
    • Jakob Stoklund Olesen's avatar
      Transfer regmasks to MRI. · a0cf42f2
      Jakob Stoklund Olesen authored
      MRI keeps track of which physregs have been used. Make sure it gets
      updated with all the regmask-clobbered registers.
      
      Delete the closePhysRegsUsed() function which isn't necessary.
      
      llvm-svn: 150830
      a0cf42f2
  13. Jan 19, 2012
  14. Jan 07, 2012
  15. Jan 03, 2012
  16. Nov 13, 2011
  17. Oct 05, 2011
    • Jakob Stoklund Olesen's avatar
      Also add <imp-use,kill> flags for redefined super-registers. · d5d39bb0
      Jakob Stoklund Olesen authored
      For example:
      
        %vreg10:dsub_0<def,undef> = COPY %vreg1
        %vreg10:dsub_1<def> = COPY %vreg2
      
      is rewritten as:
      
        %D2<def> = COPY %D0, %Q1<imp-def>
        %D3<def> = COPY %D1, %Q1<imp-use,kill>, %Q1<imp-def>
      
      The first COPY doesn't care about the previous value of %Q1, so it
      doesn't read that register.
      
      The second COPY is a partial redefinition of %Q1, so it implicitly kills
      and redefines that register.
      
      This makes it possible to recognize instructions that can harmlessly
      clobber the full super-register.  The write and don't read the
      super-register.
      
      llvm-svn: 141139
      d5d39bb0
  18. Sep 15, 2011
  19. May 06, 2011
  20. Apr 27, 2011
  21. Mar 31, 2011
  22. Mar 23, 2011
  23. Feb 18, 2011
  24. Jan 10, 2011
  25. Jan 09, 2011
  26. Nov 16, 2010
  27. Oct 08, 2010
  28. Jul 22, 2010
  29. Feb 26, 2010
    • Jakob Stoklund Olesen's avatar
      Use the right floating point load/store instructions in PPCInstrInfo::foldMemoryOperandImpl(). · ddbf7a85
      Jakob Stoklund Olesen authored
      The PowerPC floating point registers can represent both f32 and f64 via the
      two register classes F4RC and F8RC. F8RC is considered a subclass of F4RC to
      allow cross-class coalescing. This coalescing only affects whether registers
      are spilled as f32 or f64.
      
      Spill slots must be accessed with load/store instructions corresponding to the
      class of the spilled register. PPCInstrInfo::foldMemoryOperandImpl was looking
      at the instruction opcode which is wrong.
      
      X86 has similar floating point register classes, but doesn't try to fold
      memory operands, so there is no problem there.
      
      llvm-svn: 97262
      ddbf7a85
  30. Feb 10, 2010
  31. Jan 05, 2010
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