llvm-svn: 29989

number of copies, potentially defining live ranges that appear to have
differing value numbers that become identical when coallsced.  Among other
things, this fixes CodeGen/X86/shift-coalesce.ll and PR687.

llvm-svn: 29968

llvm-svn: 29921

llvm-svn: 29910

llvm-svn: 29896

paves the way for future changes, increases coallescing opportunities (in
theory, not witnessed in practice), and eliminates the really expensive
LiveIntervals::overlapsAliases method.

llvm-svn: 29890

instructions which define each value#) to simplify and improve the coallescer.
In particular, this patch:

1. Implements iterative coallescing.
2. Reverts an unsafe hack from handlePhysRegDef, superceeding it with a
   better solution.
3. Implements PR865, "coallescing" away the second copy in code like:

   A = B
   ...
   B = A

This also includes changes to symbolically print registers in intervals
when possible.

llvm-svn: 29862

defines each value# tracked by the interval.  This will be used to improve
coallescing.

llvm-svn: 29830

llvm-svn: 29805

*** Register mapping ***
  reg 1024 -> %reg1028
  reg 1026 -> EAX
  reg 1027 -> %reg1028

instead of:

*** Register mapping ***
  reg 1024 -> reg 1028
  reg 1026 -> reg 15
  reg 1027 -> reg 1028

llvm-svn: 29803

llvm-svn: 29250

llvm-svn: 29220

by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447

llvm-svn: 28236

spilled.

llvm-svn: 28220

llvm-svn: 28197

llvm-svn: 28102

llvm-svn: 28039

But this is incorrect if the spilled value live range extends beyond the
current BB.
It is currently controlled by a temporary option -spiller-check-liveout.

llvm-svn: 28024

llvm-svn: 25515

llvm-svn: 25173

GDB use tolerable

llvm-svn: 25064

llvm-svn: 24019

For example, we can now join things like [0-30:0)[31-40:1)[52-59:2)
with [40:60:0) if the 52-59 range is defined by a copy from the 40-60 range.
The resultant range ends up being [0-30:0)[31-60:1).

This fires a lot through-out the test suite (e.g. shrinking bc from
19492 -> 18509 machineinstrs) though most gains are smaller (e.g. about
50 copies eliminated from crafty).

llvm-svn: 23866

llvm-svn: 23400

llvm-svn: 23294

only add a reload live range once for the instruction.  This is one step
towards fixing a regalloc pessimization that Nate notice, but is later undone
by the spiller (so no code is changed).

llvm-svn: 23293

preserve livevar

llvm-svn: 23259

llvm-svn: 23206

llvm-svn: 22989

llvm-svn: 22529

llvm-svn: 22528

llvm-svn: 22002

llvm-svn: 21927

llvm-svn: 21420

removes noop moves.

llvm-svn: 21183

llvm-svn: 21182

llvm-svn: 20555

numbering values in live ranges for physical registers.

The alpha backend currently generates code that looks like this:

  vreg = preg
...
  preg = vreg
  use preg
...
  preg = vreg
  use preg

etc.  Because vreg contains the value of preg coming in, each of the
copies back into preg contain that initial value as well.

In the case of the Alpha, this allows this testcase:

void "foo"(int %blah) {
        store int 5, int *%MyVar
        store int 12, int* %MyVar2
        ret void
}

to compile to:

foo:
        ldgp $29, 0($27)
        ldiq $0,5
        stl $0,MyVar
        ldiq $0,12
        stl $0,MyVar2
        ret $31,($26),1

instead of:

foo:
        ldgp $29, 0($27)
        bis $29,$29,$0
        ldiq $1,5
        bis $0,$0,$29
        stl $1,MyVar
        ldiq $1,12
        bis $0,$0,$29
        stl $1,MyVar2
        ret $31,($26),1

This does not seem to have any noticable effect on X86 code.

This fixes PR535.

llvm-svn: 20536

llvm-svn: 19386