llvm-svn: 127952

not have native support for this operation (such as X86).
The legalized code uses two vector INT_TO_FP operations and is faster
than scalarizing.

llvm-svn: 127951

llvm-svn: 127948

description updates.

llvm-svn: 127947

update short descriptions to match those from the options, alphabetize table
of contents.

llvm-svn: 127946

llvm-svn: 127945

llvm-svn: 127944

llvm-svn: 127943

llvm-svn: 127941

llvm-svn: 127939

The relevant instruction table entries were changed sometime ago to no longer take
<Rt2> as an operand.  Modify ARMDisassemblerCore.cpp to accomodate the change and
add a test case.

llvm-svn: 127935

Tweak CrashRecoveryContextCleanup to provide an easy method for clients to select between 'delete' and 'destructor' cleanups, and allow the destructor of CrashRecoveryContextCleanupRegister to be pseudo re-entrant.

llvm-svn: 127929

Tweak CrashRecoveryContext::GetCurrent() to return quickly if 'gCrsahRecoveryEnabled' is false.  This avoids us needing to go to thread local storage for
the performance sensitive case where we are compiling code.

llvm-svn: 127928

(one-by-one until valgrind is happy)

llvm-svn: 127925

If an AllocaInst referred by DbgDeclareInst is used by a LoadInst then the LoadInst should also get a corresponding llvm.dbg.value intrinsic.

llvm-svn: 127924

llvm-svn: 127923

llvm-svn: 127922

llvm-svn: 127918

Add support to the ARM asm parser for the register-shifted-register forms of basic instructions like ADD.  More work left to be done to support other instances of shifter ops in the ISA.

llvm-svn: 127917

Proof-of-concept code that code-gens a module to an in-memory MachO object.
This will be hooked up to a run-time dynamic linker library (see: llvm-rtdyld
for similarly conceptual work for that part) which will take the compiled
object and link it together with the rest of the system, providing back to the
JIT a table of available symbols which will be used to respond to the
getPointerTo*() queries.

llvm-svn: 127916

llvm-svn: 127913

The llvm.dbg.value intrinsic refers to SSA values, not virtual registers, so we
should be able to extend the range of a value by tracking that value through
register copies. This greatly improves the debug value tracking for function
arguments that for some reason are copied to a second virtual register at the
end of the entry block.

We only extend the debug value range where its register is killed. All original
llvm.dbg.value locations are still respected.

Copies from physical registers are ignored. That should not be a problem since
the entry block already adds DBG_VALUE instructions for the virtual registers
holding the function arguments.

llvm-svn: 127912

llvm-svn: 127909

'ar'. Have to figure out how to make libLTO even lazier.

llvm-svn: 127901

llvm-svn: 127900

llvm-svn: 127899

- Emit mad instead of mad.rn for shader model 1.0
- Emit explicit mov.u32 instructions for reading global variables
- (most PTX instructions cannot take global variable immediates)

llvm-svn: 127895

Factor out the 64-bit specific bits into a helper function and add an
equivalent that loads the 32-bit sections. This allows using llvm-rtdyld on ARM.

llvm-svn: 127892

llvm-svn: 127891

llvm-svn: 127888

llvm-svn: 127887

llvm-svn: 127886

Add a bone-simple utility to load a MachO object into memory, look for
a function (main) in it, and run that function directly. This will be used
as a test and development platform for MC-JIT work regarding symbol resolution,
dynamic lookup, etc..

Code by Daniel Dunbar.

llvm-svn: 127885

For example, on 32-bit architecture, don't promote all uses of the IV
to 64-bits just because one use is a 64-bit cast.
Alternate implementation of the patch by Arnaud de Grandmaison.

llvm-svn: 127884

llvm-svn: 127883

For now, only the default segments are supported.

llvm-svn: 127875

llvm-svn: 127874

llvm-svn: 127873

On MSVCRT and compatible, output of %e is incompatible to Posix by default. Number of exponent digits should be at least 2. "%+03d"

FIXME: Implement our formatter in future!
llvm-svn: 127872

makes valgrind stop complaining about uninitialized variables being read when it
accesses a bitfield (category) that shares its bits with these variables.

llvm-svn: 127871