- Jul 14, 2011
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Evan Cheng authored
registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
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- Jul 11, 2011
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Evan Cheng authored
and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. llvm-svn: 134884
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- Jul 09, 2011
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Evan Cheng authored
CPU, and feature string. Parsing some asm directives can change subtarget state (e.g. .code 16) and it must be reflected in other modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance must be shared. llvm-svn: 134795
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- Jul 08, 2011
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Cameron Zwarich authored
is to use this for architectures that have a native FMA instruction. llvm-svn: 134742
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Evan Cheng authored
- Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
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- Jul 07, 2011
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Evan Cheng authored
llvm-svn: 134606
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- Jul 02, 2011
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Evan Cheng authored
llvm-svn: 134281
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- Jul 01, 2011
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Evan Cheng authored
llvm-svn: 134259
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Evan Cheng authored
itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. llvm-svn: 134257
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Evan Cheng authored
llvm-svn: 134244
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- Jun 30, 2011
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Evan Cheng authored
be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
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- Jun 29, 2011
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Eric Christopher authored
Part of rdar://9643582 llvm-svn: 134083
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- Jun 28, 2011
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Evan Cheng authored
llvm-svn: 134030
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Evan Cheng authored
llvm-svn: 134027
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Evan Cheng authored
llvm-svn: 134024
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Evan Cheng authored
sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021
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- Jun 27, 2011
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Evan Cheng authored
into XXXGenRegisterInfo.inc. llvm-svn: 133922
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- Jun 24, 2011
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Evan Cheng authored
target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
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- Jun 16, 2011
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Jakob Stoklund Olesen authored
This simplifies many of the target description files since it is common for register classes to be related or contain sequences of numbered registers. I have verified that this doesn't change the files generated by TableGen for ARM and X86. It alters the allocation order of MBlaze GPR and Mips FGR32 registers, but I believe the change is benign. llvm-svn: 133105
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- Jun 09, 2011
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Jakob Stoklund Olesen authored
The register allocators automatically filter out reserved registers and place the callee saved registers last in the allocation order, so custom methods are no longer necessary just for that. Some targets still use custom allocation orders: ARM/Thumb: The high registers are removed from GPR in thumb mode. The NEON allocation orders prefer to use non-VFP2 registers first. X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble. SystemZ: Some of the allocation orders are omitting R12 aliases without explanation. I don't understand this target well enough to fix that. It looks like all the boilerplate could be removed by reserving the right registers. llvm-svn: 132781
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Eric Christopher authored
No functional change. Part of PR6965 llvm-svn: 132763
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- May 30, 2011
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Rafael Espindola authored
directives. Fixes PR9826. llvm-svn: 132317
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- May 29, 2011
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Rafael Espindola authored
llvm-svn: 132278
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- May 06, 2011
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Eli Friedman authored
llvm-svn: 131012
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- May 03, 2011
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Benjamin Kramer authored
llvm-svn: 130755
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- Apr 15, 2011
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Chris Lattner authored
Luis Felipe Strano Moraes! llvm-svn: 129558
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- Feb 22, 2011
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Devang Patel authored
In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body. This requires some coordination with debugger to get this working. - The debugger needs to be aware of prolog_end attribute attached with line table entries. - The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+) llvm-svn: 126155
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- Feb 21, 2011
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Venkatraman Govindaraju authored
llvm-svn: 126108
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- Feb 20, 2011
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Oscar Fuentes authored
of testing for its presence at cmake time. This way the build automatically regenerates the makefiles when a svn update brings in a new sublibrary. llvm-svn: 126068
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- Feb 16, 2011
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Stuart Hastings authored
other getNode() methods. Radar 9002173. llvm-svn: 125665
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- Feb 12, 2011
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Venkatraman Govindaraju authored
llvm-svn: 125444
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- Jan 31, 2011
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Devang Patel authored
llvm-svn: 124611
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- Jan 22, 2011
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Venkatraman Govindaraju authored
Pass sret arguments through the stack instead of through registers in Sparc backend. It makes the code generated more compliant with the sparc32 ABI. llvm-svn: 124030
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Venkatraman Govindaraju authored
llvm-svn: 124027
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- Jan 21, 2011
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Venkatraman Govindaraju authored
Rename FLUSH to FLUSHW. Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used. llvm-svn: 123997
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Venkatraman Govindaraju authored
llvm-svn: 123974
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- Jan 20, 2011
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Venkatraman Govindaraju authored
with useful instructions. llvm-svn: 123884
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- Jan 18, 2011
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Venkatraman Govindaraju authored
SPARC backend: Modified LowerCall and LowerFormalArguments so that they use CallingConv assignments. llvm-svn: 123749
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- Jan 16, 2011
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Venkatraman Govindaraju authored
llvm-svn: 123561
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- Jan 13, 2011
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Jakob Stoklund Olesen authored
llvm-svn: 123399
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