Fix a memory leak in the analyzer - BugReports didn't get freed. Plus, remove invalid assert from the destructor which wasn't called previously due to the leak.

llvm-svn: 138027

llvm-svn: 138026

llvm-svn: 138025

llvm-svn: 138024

llvm-svn: 138023

C API functions must be able to see their extern "C" definitions, or it will be impossible to call them from C.

llvm-svn: 138022

the exception to get more stack trace information.

llvm-svn: 138021

 - reorganizing the PTS (Partial Template Specializations) in FormatManager.h
 - applied a patch by Filipe Cabecinhas to make LLDB compile with GCC
Functional changes:
 - fixed an issue where command type summary add for type "struct Foo" would not match any types.
   currently, "struct" will be stripped off and type "Foo" will be matched.
   similar behavior occurs for class, enum and union specifiers.

llvm-svn: 138020

Add a decorator for marking clang only expectedFailure.  Use it for the test_step_over_3_times_with_dsym/dwarf()
test cases in TestThreadAPI.py by decorating it with @expectedFailureClang.

Example:

    @expectedFailureClang
    @python_api_test
    def test_step_over_3_times_with_dwarf(self):
        """Test Python SBThread.StepOver() API."""
        # We build a different executable than the default buildDwarf() does.
        d = {'CXX_SOURCES': 'main2.cpp', 'EXE': self.exe_name}
        self.buildDwarf(dictionary=d)
        self.setTearDownCleanup(dictionary=d)
        self.step_over_3_times(self.exe_name)

llvm-svn: 138019

Normally, a partial register def is treated as reading the
super-register unless it also defines the full register like this:

  %vreg110:sub_32bit<def> = COPY %vreg77:sub_32bit, %vreg110<imp-def>

This patch also uses the <undef> flag on partial defs to recognize
non-reading operands:

  %vreg110:sub_32bit<def,undef> = COPY %vreg77:sub_32bit

This fixes a subtle bug in RegisterCoalescer where LIS->shrinkToUses
would treat a coalesced copy as still reading the register, extending
the live range artificially.

My test case only works when I disable DCE so a dead copy is left for
RegisterCoalescer, so I am not including it.

<rdar://problem/9967101>

llvm-svn: 138018

when falling back to cc1plus for our compile.

rdar://9963920

llvm-svn: 138017

known-incremented level, because the two concepts can be used
to prove the saftey of a retain+release removal in different
ways.

llvm-svn: 138016

We have to be careful when splitting the landing pad block, because the
landingpad instruction is required to remain as the first non-PHI of an invoke's
unwind edge. To retain this, we split the block into two blocks, moving the
predecessors within the loop to one block and the remaining predecessors to the
other. The landingpad instruction is cloned into the new blocks.

llvm-svn: 138015

SplitLandingPadPredecessors is similar to SplitBlockPredecessors in that it
splits the current block and attaches a set of predecessors to the new basic
block. However, it differs from SplitBlockPredecessors in that it's specifically
designed to handle landing pad blocks.

Two new basic blocks are created: one that is has the vector of predecessors as
its predecessors and one that has the remaining predecessors as its
predecessors. Those two new blocks then receive a cloned copy of the landingpad
instruction from the original block. The landingpad instructions are joined in a
PHI, etc. Like SplitBlockPredecessors, it updates the LLVM IR, AliasAnalysis,
DominatorTree, DominanceFrontier, LoopInfo, and LCCSA analyses.

llvm-svn: 138014

llvm-svn: 138013

instead of 2. They were already defined this way in their regular
version, but not for the intrinsics versions (*_Int), and that would work
for assembly emission but not for object code, since a MachineOperand
would be missing. This commit fix PR10697.

Also removed the {VSQRT,VRSQRT,VRCP}r_Int forms and match the intrinsic
via INSERT_SUBREG+EXTRACT_SUBREG patterns. The same couldn't be done for
memory versions because sse_load_f32/sse_load_f64 operand need special
handling and don't work like regular "addr" operands.

There are right now 114 "*_Int" and 98 "Int_*" forms! I'm slowly
removing them as I step through, but hope we can get rid of these
someday, they are really annoying :)

llvm-svn: 138012

Failed possibly due to rollback of llvm/clang.

llvm-svn: 138011

There is no need to add file as context for subroutine type. The subroutine type does not need any context.

llvm-svn: 138010

add the comments of each declaration follow it, making it easier to read and compare to GCC's result.

llvm-svn: 138009

llvm-svn: 138008

piece of it) that is being passed by value is smaller than a word.

llvm-svn: 138007

llvm-svn: 138006

This patch adds support of NativeClient (*-*-nacl) OS support to LLVM.
It's already supported in autoconf/config.sub.

The motivation for this change is to start upstreaming PNaCl work. The
whole set of patches include llvm backends (i686, x86_64, ARM),
llvm-gcc (probably, would not be upstreamed because it's deprecated)
and clang (the work has been just started, the amount of changes is
going to be low and the most of the work is expected to be done close
to the mainline).

llvm-svn: 138005

Enhance -Wstrl-incorrect-size to not report a FIXIT for destinations that are flexible arrays or have size 1.

llvm-svn: 138004

STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate.
Found by randomized testing.

llvm-svn: 138003

Add an option (-p regexp-pattern) to specify the regular expression symbol pattern we're interested in disassembling.

An example:

utils/test/lldb-disasm.py -C "platform select remote-ios" -o "-b -n" -e '~/CoreFoundation' -n 20 -p '-\[NSArray .+\]'

disassembles the first 20 NSArray instance methods found in the CoreFoundation module.

llvm-svn: 138002

One API change: I added BugReporter as an additional parameter to the BugReporterVisitor::VisitNode() method to allow visitors register other visitors with the report on the fly (while processing a node). This functionality is used by NilReceiverVisitor, which registers TrackNullOrUndefValue when the receiver is null.

llvm-svn: 138001

llvm-svn: 138000

llvm-svn: 137999

llvm-svn: 137998

Remember to fill in some operands so we can print _something_ coherent even when decoding the CPS instruction soft-fails.

llvm-svn: 137997

Fixes a large class of disassembler crashes found by randomized testing.

llvm-svn: 137995

llvm-svn: 137993

llvm-svn: 137991

This could be useful by reducing the strain on standard output.

Example:

utils/test/lldb-disasm.py -C "platform select remote-ios" -o "-b -n" -e '~/CoreFoundation' -n 50 -q

llvm-svn: 137988

uncorrected identifier. Fixes a problem pointed out by Eli.

llvm-svn: 137987

Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.

llvm-svn: 137986

llvm-svn: 137985

from the GNU upstream: git://git.savannah.gnu.org/config.git

1. It eliminates a local LLVM patch for auroraux (because, the
mainline config.sub has already got support of auroraux)
2. It adds several new recognized target cpus and operating systems
(in particular, PNaCl)

llvm-svn: 137984

llvm-svn: 137983