SSE, so we can't return floating point values if this
is disabled.  Detect this error for clang.

With SSE1 only, f64 is a problem; it can be done, but
neither llvm-gcc nor clang has ever generated correct
code for it.  Since nobody noticed this I think it's
OK to treat it as an error for now.

This also handles SSE-sized vectors of floating point.
8207686, 8204109.

llvm-svn: 109201

Fix some AVX instructions which didnt had HasAVX prefix. And also a problem with PINSRW, which was totally wrong because of a typo I introduced previously

llvm-svn: 109198

ARM/PPC/MSP430-specific code (which are the only targets that
implement the hook) can directly reference their target-specific
instrinfo classes.

llvm-svn: 109171

"yet another" copy of the dwarf EH emission code that was
copied, pasted and slightly hacked up.

llvm-svn: 109169

Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step

llvm-svn: 109168

llvm-svn: 109167

This is probably not the best way to implement "Force LR to 
be spilled if the Thumb function size is > 2048." do this, 
it should use the branch shortening infrastructure, but I'm
just preserving functionality here.

llvm-svn: 109165

llvm-svn: 109154

rip out the implementation of X86InstrInfo::GetInstSizeInBytes.
The code being ripped out just implemented a copy and hacked up
version of the (old) instruction encoder, and is buggy and 
terrible in other ways.  Since "GetInstSizeInBytes" is really 
only there to support the JIT's "NeedsExactSize" hook (which
noone is using), just rip out the code.  I will rip out the
NeedsExactSize hook next.

This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter

llvm-svn: 109149

llvm-svn: 109132

llvm-svn: 109125

llvm-svn: 109122

A non function local MDNode can have an operand which is cloned by MapValue(). 

llvm-svn: 109117

llvm-svn: 109104

llvm-svn: 109103

llvm-svn: 109101

llvm-svn: 109100

llvm-svn: 109099

llvm-svn: 109098

llvm-svn: 109094

llvm-svn: 109093

llvm-svn: 109092

llvm-svn: 109091

llvm-svn: 109090

The RegionInfo pass detects single entry single exit regions in a function,
where a region is defined as any subgraph that is connected to the remaining
graph at only two spots.
Furthermore an hierarchical region tree is built.
Use it by calling "opt -regions analyze" or "opt -view-regions".

llvm-svn: 109089

especially on other platforms. Is there a better way to fix this.

llvm-svn: 109084

llvm-svn: 109083

llvm-svn: 109082

llvm-svn: 109081

Patch by Olivier Meurant!

llvm-svn: 109080

llvm-svn: 109079

for lowering without sse2.  Add a couple of new testcases.

Fixes a few libgomp tests and latent bugs.  Remove a few todos.

llvm-svn: 109078

Fix constant island pass's handling of tBR_JTr. The offset of the instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into:
        mov     pc, r1
        .align  2
LJTI0_0_0:
        .long    LBB0_14

This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one.

llvm-svn: 109076

llvm-svn: 109070

llvm-svn: 109069

llvm-svn: 109064

Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)

llvm-svn: 109063

for creating and populating NamedMDNodes.

llvm-svn: 109061

and then forced every register to be a vr128 on win64.

llvm-svn: 109060

Add INSTANTIATE_AG_PASS, which combines RegisterPass<> with RegisterAnalysisGroup<> for pass registration.

llvm-svn: 109058