Fixed an iteration condition in PreAllocSplitting. This should fix some miscompilations casued by PreAllocSplitting.

llvm-svn: 86919

This patch forbids implicit conversion of DenseMap::const_iterator to
DenseMap::iterator which was possible because DenseMapIterator inherited
(publicly) from DenseMapConstIterator. Conversion the other way around is now
allowed as one may expect.

The template DenseMapConstIterator is removed and the template parameter
IsConst which specifies whether the iterator is constant is added to
DenseMapIterator.

Actually IsConst parameter is not necessary since the constness can be
determined from KeyT but this is not relevant to the fix and can be addressed
later.

Patch by Victor Zverovich!

llvm-svn: 86636

llvm-svn: 86521

This introduces a new pass, SlotIndexes, which is responsible for numbering
instructions for register allocation (and other clients). SlotIndexes numbering
is designed to match the existing scheme, so this patch should not cause any
changes in the generated code.

For consistency, and to avoid naming confusion, LiveIndex has been renamed
SlotIndex.

The processImplicitDefs method of the LiveIntervals analysis has been moved
into its own pass so that it can be run prior to SlotIndexes. This was
necessary to match the existing numbering scheme.

llvm-svn: 85979

Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.

llvm-svn: 85042

llvm-svn: 84682

llvm-svn: 84681

Distinquish stack slots from other stack objects. They (and fixed objects) get FixedStack PseudoSourceValues.

llvm-svn: 84326

llvm-svn: 83608

llvm-svn: 83589

llvm-svn: 83255

llvm-svn: 83254

Removed static qualifier from a few index related methods. These methods may require a LiveIntervals instance in future.

llvm-svn: 81374

a new class, MachineInstrIndex, which hides arithmetic details from
most clients. This is a step towards allowing the register allocator
to update/insert code during allocation.

llvm-svn: 81040

update all code that this affects.

llvm-svn: 79830

Modified VNInfo. The "copy" member is now a union which holds the copy for a register interval, or the defining register for a stack interval. Access is via getCopy/setCopy and getReg/setReg.

llvm-svn: 78620

llvm-svn: 77754

Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.

llvm-svn: 75900

llvm-svn: 75423

and abort()/exit() -> llvm_report_error().

llvm-svn: 75363

as an (index,bool) pair. The bool flag records whether the kill is a
PHI kill or not. This code will be used to enable splitting of live
intervals containing PHI-kills.

A slight change to live interval weights introduced an extra spill
into lsr-code-insertion (outside the critical sections). The test 
condition has been updated to reflect this.

llvm-svn: 75097

llvm-svn: 73634

In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However,  reloads and restores might be folded into uses / defs and freed registers might not be used at all.

VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants.

Not yet enabled. This is part 1. More coming.

llvm-svn: 70787

register destinations that are tied to source operands.  The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly.  The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).

llvm-svn: 68714

Remove the "fast" cases for spill and restore point determination, as these were subtlely wrong in obscure cases.  Patch the testcase
to account for this change.

llvm-svn: 68093

useful with it at the moment, but it will in the future.

llvm-svn: 67012

llvm-svn: 66158

Be more careful about choosing restore points when doing restore folding.  This fixes some subtle miscompilations.

llvm-svn: 66147

Add a restore folder, which shaves a dozen or so machineinstrs off oggenc.  Update a testcase to check this.

llvm-svn: 66029

llvm-svn: 65121

Add TargetInstrInfo::isSafeToMoveRegisterClassDefs. It returns true if it's safe to move an instruction which defines a value in the register class. Replace pre-splitting specific IgnoreRegisterClassBarriers with this new hook.

llvm-svn: 63936

between call frame setup/restore points.  Unfortunately, this regresses 
code size a bit, but at least it's correct now!

llvm-svn: 63837

Live interval reconstruction needs to account for this, and scour its maps to
prevent dangling references.

llvm-svn: 63558

llvm-svn: 63536

llvm-svn: 63492

Fix an issue in PHI construction that was exposed by GCC 4.2 producing a different set iteration order for the reg_iterator.

llvm-svn: 63490

Correct the algorithms for choosing spill and restore points so that we don't try to insert loads/stores between call frame setup and the actual call.

This fixes the last known failure for the pre-alloc-splitter.

llvm-svn: 63339

and an iterator invalidation issue.

FreeBench/pifft no longer miscompiles with these fixes!

llvm-svn: 63293

llvm-svn: 63276

vast majority of code size regressions introduced by pre-alloc-splitting.

llvm-svn: 63274