"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter

llvm-svn: 144414

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140887

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140886

Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140878

llvm-svn: 140233

llvm-svn: 139622

llvm-svn: 139607

Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= handling to llvm-mc. Reviewed by Owen Anderson.

llvm-svn: 139237

These are strictly utilities for registering targets and components.

llvm-svn: 138450

from MC.

llvm-svn: 138367

llvm-svn: 135974

llvm-svn: 135826

InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.

llvm-svn: 135812

- Introduce JITDefault code model. This tells targets to set different default
  code model for JIT. This eliminates the ugly hack in TargetMachine where
  code model is changed after construction.

llvm-svn: 135580

(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.

llvm-svn: 135468

better location welcome).

llvm-svn: 135438

to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.

llvm-svn: 135424

Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes.

llvm-svn: 135219

registeration and creation code into XXXMCDesc libraries.

llvm-svn: 135184