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  1. Jun 17, 2013
    • Andrew Trick's avatar
      MI-Sched: Track multiple candidates with the same priority level. · d40d0f2c
      Andrew Trick authored
      This eliminates the MultiPressure scheduling "reason". It was
      sensitive to queue order. We don't like being sensitive to queue
      order.
      
      llvm-svn: 184129
      d40d0f2c
    • Bill Wendling's avatar
      Directly access objects which may change during compilation. · 626c991c
      Bill Wendling authored
      llvm-svn: 184121
      626c991c
    • Benjamin Kramer's avatar
      Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo. · e2a1d89e
      Benjamin Kramer authored
      The main advantages here are way better heuristics, taking into account not
      just loop depth but also __builtin_expect and other static heuristics and will
      eventually learn how to use profile info. Most of the work in this patch is
      pushing the MachineBlockFrequencyInfo analysis into the right places.
      
      This is good for a 5% speedup on zlib's deflate (x86_64), there were some very
      unfortunate spilling decisions in its hottest loop in longest_match(). Other
      benchmarks I tried were mostly neutral.
      
      This changes register allocation in subtle ways, update the tests for it.
      2012-02-20-MachineCPBug.ll was deleted as it's very fragile and the instruction
      it looked for was gone already (but the FileCheck pattern picked up unrelated
      stuff).
      
      llvm-svn: 184105
      e2a1d89e
  2. Jun 16, 2013
    • David Blaikie's avatar
      DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs · b735b4d6
      David Blaikie authored
      Frame index handling is now target-agnostic, so delete the target hooks
      for creation & asm printing of target-specific addressing in DBG_VALUEs
      and any related functions.
      
      llvm-svn: 184067
      b735b4d6
    • David Blaikie's avatar
      Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions · 0252265b
      David Blaikie authored
      Rather than using the full power of target-specific addressing modes in
      DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This
      reduces the complexity of debug info handling down to two
      representations of values (reg+offset and frame index+offset) rather
      than three or four.
      
      Ideally we could ensure that frame indicies had been eliminated by the
      time we reached an assembly or dwarf generation, but I haven't spent the
      time to figure out where the FIs are leaking through into that & whether
      there's a good place to convert them. Some FI+offset=>reg+offset
      conversion is done (see PrologEpilogInserter, for example) which is
      necessary for some SelectionDAG assumptions about registers, I believe,
      but it might be possible to make this a more thorough conversion &
      ensure there are no remaining FIs no matter how instruction selection
      is performed.
      
      llvm-svn: 184066
      0252265b
  3. Jun 15, 2013
  4. Jun 14, 2013
  5. Jun 13, 2013
  6. Jun 12, 2013
  7. Jun 11, 2013
  8. Jun 10, 2013
  9. Jun 09, 2013
  10. Jun 08, 2013
  11. Jun 07, 2013
  12. Jun 06, 2013
  13. Jun 05, 2013
    • David Blaikie's avatar
      PR15662: Optimized debug info produces out of order function parameters · 6f1a8067
      David Blaikie authored
      When a function is inlined we lazily construct the variables
      representing the function's parameters. After that, we add any remaining
      unused parameters.
      
      If the function doesn't use all the parameters, or uses them out of
      order, then the DWARF would produce them in that order, producing a
      parameter order that doesn't match the source.
      
      This fix causes us to always keep the arg variables at the start of the
      variable list & in the original order from the source.
      
      llvm-svn: 183297
      6f1a8067
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