temporary data. 

llvm-svn: 139725

Fix a bug in handling default flags for both ARM and Thumb encodings.

llvm-svn: 139721

llvm-svn: 139717

llvm-svn: 139715

Select the right 16 vs. 32 bit encoding in an IT block.

llvm-svn: 139714

llvm-svn: 139712

which could theoretically throw.

llvm-svn: 139710

in memory relevant to the optimizer. rdar://10050579.

llvm-svn: 139708

Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.

rdar://8883573

llvm-svn: 139707

llvm-svn: 139705

THe LRE_DidCloneVirtReg callback may be called with vitual registers
that RAGreedy doesn't even know about yet.  In that case, there are no
data structures to update.

llvm-svn: 139702

llvm-dwarfdump: Make the "is debug info section" heuristic stricter so it doesn't accidentaly picks up the wrong section.

Also add some validation code to the aranges section parser.

Fixes PR10926.

llvm-svn: 139701

llvm-svn: 139699

When a back-copy is hoisted to the nearest common dominator, keep
looking up the dominator tree for a less loopy dominator, and place the
back-copy there instead.

Don't do this when a single existing back-copy dominates all the others.
Assume the client knows what he is doing, and keep the dominating
back-copy.

This prevents us from hoisting back-copies into loops in most cases.  If
a value is defined in a loop with multiple exits, we may still hoist
back-copies into that loop.  That is the speed/size tradeoff.

llvm-svn: 139698

llvm-svn: 139697

llvm-svn: 139695

llvm-svn: 139692

Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler.

llvm-svn: 139691

llvm-svn: 139690

llvm-svn: 139689

- Add TSFlags for the instruction formats. The idea here is to use
  as much encoding as possible from getBinaryCodeForInstr, and having
  TSFLags formats for that would make it easier to encode most part
  of the instructions (since Mips encodings are pretty straightforward)
- Improve the mips mechanism for compilation callback
- Add Mips specific code for invalidating the instruction cache
- Next patch will address wrong tablegen encoding

Commit msg added by my own but the patch is from Sasa Stankovic.

llvm-svn: 139688

alignment check for 256-bit classes more strict. There're no testcases
but we catch more folding cases for AVX while running single and multi
sources in the llvm testsuite.

Since some 128-bit AVX instructions have different number of operands
than their SSE counterparts, they are placed in different tables.

256-bit AVX instructions should also be added in the table soon. And
there a few more 128-bit versions to handled, which should come in
the following commits.

llvm-svn: 139687

llvm-svn: 139686

llvm-svn: 139684

- Add enum SymbolType and function getSymbolType()
- Add function isGlobal() - it's returns true for symbols that can be used in another objects, such as library functions.
- Rename function getAddress() to getOffset() and add new function getAddress(), because currently getAddress() returns section offset of symbol first byte. new getAddress() return symbol address.
- Change usage SymbolRef::getAddress() to getOffset() in tools/llvm-nm and tools/llvm-objdump.

Patch by Danil Malyshev!

llvm-svn: 139683

Remove unimplemented function prototypes from PathV2. They can be readded when someone cares enough.

Patch by Aaron Ballman!

llvm-svn: 139682

This is only one half of it, the part that caches address ranges from the DIEs when .debug_aranges is
not available will be ported soon.

llvm-svn: 139680

llvm-svn: 139676

Remove ancient debug info constructs from test cases, they are not relevant to test case's main objective.

llvm-svn: 139675

llvm-svn: 139674

llvm-svn: 139671

llvm-svn: 139670

#line directives with the needed support in the lexer.  Next will be to build
a simple file/line# table mapping source SMLoc's for later use by diagnostics.
And the last step will be to get the diagnostics to use the mapping for file
and line numbers.

llvm-svn: 139669

It seems i686-cygwin-gcc-4.3 does not accept 64-bit constant without LL.

llvm-svn: 139664

When a ParentVNI maps to multiple defs in a new interval, its live range
may still be derived directly from RegAssign by transferValues().

On the other hand, when instructions have been rematerialized or
hoisted, it may be necessary to completely recompute live ranges using
LiveRangeCalc::extend() to all uses.

Use a bit in the value map to indicate that a live range must be
recomputed.  Rename markComplexMapped() to forceRecompute().

This fixes some live range verification errors when
-split-spill-mode=size hoists back-copies by recomputing source ranges
when RegAssign kills can't be moved.

llvm-svn: 139660

llvm-svn: 139658

llvm-svn: 139656

llvm-svn: 139652

Whenever the complement interval is defined by multiple copies of the
same value, hoist those back-copies to the nearest common dominator.

This ensures that at most one copy is inserted per value in the
complement inteval, and no phi-defs are needed.

llvm-svn: 139651

llvm-svn: 139649