llvm-svn: 74807

than a wider one, before trying to compare their contents which will crash
if their sizes are different.

llvm-svn: 74792

Use only the *dirname* of the pathname given to -o, so that -o can still be used
to name the output executable. This is more like what GCC 4.5 does.

llvm-svn: 74790

Controlled via the --enable-llvmc-dynamic-plugins option.

llvm-svn: 74784

llvm-svn: 74783

llvm-svn: 74782

llvm-svn: 74781

Use it by requiring it through the pass manager, then calling its createSSI
method on the variables that you want in SSI form.

llvm-svn: 74780

llvm-svn: 74779

llvm-svn: 74778

llvm-svn: 74777

llvm-svn: 74776

llvm-svn: 74773

The change in the .td file is to mark the side effects of mov insn.

llvm-svn: 74768

Don't spill to the CR save area when using the SVR4 ABI for now.
Don't rely on constants assigned for registers to be in order (they aren't assigned in order).
Make sure CR bits are mapped to the corresponding CR field.

llvm-svn: 74767

Make CalculateParameterAndLinkageAreaSize() Darwin-specific.
Remove SVR4 specific code from LowerCALL_Darwin() and LowerFORMAL_ARGUMENTS_Darwin().
Rename MachoABI to DarwinABI for consistency.
Rename ELF ABI to SVR4 ABI for consistency.
Factor out common call return lowering between the Darwin and SVR4 ABI.
Factor out common call lowering between the Darwin and SVR4 ABI.

llvm-svn: 74766

Implement LowerFORMAL_ARGUMENTS_SVR4().
Implement LowerCALL_SVR4().
Add support for split arguments.
Implement by value parameter passing for aggregates.
Add support for variable argument lists.
Create the spill area for argument registers of variable argument functions no longer at a fixed offset.
Make sure callee saved registers are spilled to the correct stack offsets.
Change allocation order of non-volatile floating-point registers.
Add VRSAVE to the list of callee-saved registers, add CallConvLowering for vararg calls.
Add support for variable argument calls with Vector arguments.
Add support for VR and VRSAVE save area, improve allocation order for non-volatile vector registers.
Stop creating illegal i8 values in LowerVASTART().
Add memory access width hints.
Make sure to reserve space on the stack for the frame pointer.
When using the SVR4 ABI, reserve r13 for the Small Data Area pointer.
Assure that the frame pointer is spilled to the correct location on the stack.
Some FP registers were not marked as volatile.
Make sure the i64 words from a long double are passed either both in registers or both on the stack.
Only put integer arguments in registers which are not marked with the inreg flag.

llvm-svn: 74765

Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call.

With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put 
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.

The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.

llvm-svn: 74764

Small refactoring in LowerFORMAL_ARGUMENTS().
Correct minor formatting issues.
Remove size argument of CreateCopyOfByValArgument().
Remove dead argument from CalculateStackSlotSize().
Remove unused variable ReturnAddrIndex from various targets.

llvm-svn: 74763

llvm-svn: 74760

Controls whether libCompilerDriver should be loaded dynamically. By default this
is needed only on Win32, to make dynamic plugins work.

llvm-svn: 74759

llvm-svn: 74755

llvm-svn: 74754

llvm-svn: 74753

llvm-svn: 74749

llvm-svn: 74748

llvm-svn: 74741

llvm-svn: 74740

llvm-svn: 74739

llvm-svn: 74736

llvm-svn: 74735

llvm-svn: 74734

llvm-svn: 74733

it to print them.  This gives us column numbers in the diag line.  Before:

t.s:4: error: unexpected token in argument list
 mov %eax %edx
          ^

now:
t.s:4:11: error: unexpected token in argument list
 mov %eax %edx
          ^

llvm-svn: 74732

Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.

llvm-svn: 74731

llvm-svn: 74720

llvm-svn: 74718

llvm-svn: 74714

llvm-svn: 74710

llvm-svn: 74708