to the Intel register table.
Added 16- and 64-bit MOVs to and from the segment
registers to the Intel instruction tables.

llvm-svn: 81895

interrupt instruction, which shouldn't arise any other way).  0xcd is
also used by JITMemoryManager to initialize the buffer to garbage,
which means it could appear following a noreturn call even when
that is not a stub, confusing X86CompilationCallback2.  PR 4929.

llvm-svn: 81888

values to machineinstrs.

llvm-svn: 81886

llvm-svn: 81881

VLDM/VSTM instructions, and without this check, the code assumes that an
offset is allowed, as it would be with VLDR/VSTR.  The asm printer,
however, silently drops the offset, producing incorrect code.  Since the
address register in this case is either the stack or frame pointer, the
spill location ends up conflicting with some other stack slot or with
outgoing arguments on the stack.

llvm-svn: 81879

llvm-svn: 81878

and PIC codegen.  Patch by Venkatraman Govindaraju!

llvm-svn: 81877

llvm-svn: 81827

has multiple uses, as one of the other uses may be on a path
to a different node above the callseq_start, because that
leads to a cyclic graph. This problem is exposed when
-combiner-global-alias-analysis is used. This fixes PR4880.

llvm-svn: 81821

versions of CALL and JMP with segmented addresses
provided in-line, as pairs of immediates.

llvm-svn: 81818

parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will
give an error is called.  Broke out the test of the .word directive into two
different test cases, one for x86 and one for arm.

llvm-svn: 81817

its result if the condition is false.

llvm-svn: 81814

llvm-svn: 81773

llvm-svn: 81770

llvm-svn: 81755

full AsmPrinter, and change TargetRegistry to keep track
of registered MCInstPrinters.

llvm-mc is still linking in the entire
target foo to get the code emitter stuff, but this is an
important step in the right direction.

llvm-svn: 81754

be a MCInstPrinter.

llvm-svn: 81746

llvm-svn: 81744

llvm-svn: 81726

llvm-svn: 81718

llvm-svn: 81714

the object, make it static instead of const.

llvm-svn: 81711

of getting it from TRI, inst printing now is codegen context
free!

llvm-svn: 81710

Nothing is using this info yet.

llvm-svn: 81707

all the other targets.  Add support for weak/linkonce linkage so it doesn't
crash on basically all nontrivial testcases.

llvm-svn: 81704

class into its own X86ATTInstPrinter class.  The inst
printer now has just one dependence on the code generator
(TRI).

llvm-svn: 81703

llvm-svn: 81699

llvm-svn: 81689

Change the picbase symbol on non-darwin systems from ".Lllvm$4.$piclabel" to
".L4$pb".  The actual name doesn't matter and the darwin name is shorter.

llvm-svn: 81688

llvm-svn: 81685

now that printBasicBlockLabel is only used for starting
a MBB.  This allows elimination of a bunch of arguments.

llvm-svn: 81684

instead.

llvm-svn: 81677

llvm-svn: 81658

with subreg - superreg mapping and also fix PR4965.

llvm-svn: 81657

Move GetMBBSymbol up to AsmPrinter and make printBasicBlockLabel use it so that
we only have one place that decides what to name bb labels.  Hopefully various
clients of printBasicBlockLabel can start using GetMBBSymbol instead.

llvm-svn: 81652

constraint the register usage.

llvm-svn: 81635

llvm-svn: 81630

this means that it can only lower one MachineInstr to one MCInst.  To
make this fly, we need to pull out handling of MO_GOT_ABSOLUTE_ADDRESS
(which generates an implicit label) out of X86MCInstLower.

llvm-svn: 81629

MBB labels like everything else.

llvm-svn: 81628

being embedded into X86ATTAsmPrinter).  This still depends heavily
on X86ATTAsmPrinter, but this is a step in the right direction.

llvm-svn: 81627