llvm-svn: 26244

other small targets that do that can be learned from.  They also have
the added advantage of being tested :)

llvm-svn: 26243

turns out not to point to a constant string but it forgot change the offset
back.

llvm-svn: 26242

   proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.

llvm-svn: 26241

llvm-svn: 26240

llvm-svn: 26239

and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238

llvm-svn: 26237

llvm-svn: 26236

Change SplitBlock to increment a BasicBlock::iterator, not an Instruction*.  Apparently they do different things :)

This fixes a testcase that nate reduced from spass.

Also included are a couple minor code changes that don't affect the generated
code at all.

llvm-svn: 26235

llvm-svn: 26234

distinguish between objects and register names, now we can have stuff
with names like "f84", "in6" etc etc.

this should fix one or two tests

llvm-svn: 26232

We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231

by Nate, I'm just committing it for him.

llvm-svn: 26230

want to copy the files when the .cpp file changes, we want to copy them
to the .cvs versions when the .l/.y file change (like the comments even say).
This avoids having bogus changes show up in diffs.

llvm-svn: 26229

llvm-svn: 26228

llvm-svn: 26227

transfer.

According to the Intel P4 Optimization Manual:

Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.

Not to mention movaps is shorter than movss.

llvm-svn: 26226

llvm-svn: 26225

Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).

llvm-svn: 26224

unswitch this loop on 2 before sweating to unswitch on 1/3.

void test4(int N, int i, int C, int*P, int*Q) {
  int j;
  for (j = 0; j < N; ++j) {
    switch (C) {                // general unswitching.
    default: P[i+j] = 0; break;
    case 1: Q[i+j] = 0; break;
    case 3: P[i+j] = Q[i+j]; break;
    case 2: break;              //  TRIVIAL UNSWITCH on C==2
    }
  }
}

llvm-svn: 26223

llvm-svn: 26222

llvm-svn: 26221

this for example:

  for (j = 0; j < N; ++j) {     // trivial unswitch
    if (C)
      P[i+j] = 0;
  }

turning it into the obvious code without bothering to duplicate an empty loop.

llvm-svn: 26220

llvm-svn: 26219

llvm-svn: 26218

llvm-svn: 26217

MachineDebugInfo tables.

llvm-svn: 26216

Y = seteq bool X, true
instead of just using X :)

llvm-svn: 26215

llvm-svn: 26213

llvm-svn: 26211

llvm-svn: 26209

llvm-svn: 26208

llvm-svn: 26207

llvm-svn: 26206

like the flex stuff, which actually works when people do cvs updates and
get conflicts in the updated checked in file.

llvm-svn: 26205

it, because this:

.bss
X:
.byte 0

results in the assembler warning: "initialization in bss segment".  Annoying.

llvm-svn: 26204

llvm-svn: 26203

The ABI specifies that there is a register save area at the bottom of the
stack, which means the actual used pointer needs to be an offset from
the subtracted value.

llvm-svn: 26202

GCC's syntax for auto-dependency generation stuff. This should
be changed to be disabling dependency stuff unless GCC/ICC is
found.

llvm-svn: 26201