llvm-svn: 108254

with this commit the callee moves to the end of
the operand array (from the start) and the call
arguments now start at index 0 (formerly 1)

this ordering is now consistent with InvokeInst

this commit only flips the switch,
functionally it is equivalent to
r101465

I intend to commit several cleanups after a few
days of soak period

llvm-svn: 108240

avoid replicated code.

llvm-svn: 108227

disassembler.  Remove some code from the disassembler to
compensate, unbreaking disassembly of lea's.

llvm-svn: 108226

llvm-svn: 108224

llvm-svn: 108223

llvm-svn: 108222

Move some SIMD fragment code into X86InstrFragmentsSIMD so that the
utility classes can be used from multiple files.  This will aid
transitioning to a new refactored x86 SIMD specification.

llvm-svn: 108213

llvm-svn: 108207

llvm-svn: 108204

SD instructions too, in addition to SS instructions. And
add a comment about it.

llvm-svn: 108191

instructions already have implicit defs of LR.  The comment suggests that
this is intended to fix something like pr6111, but it doesn't really do
that either.

llvm-svn: 108186

llvm-svn: 108184

llvm-svn: 108167

support branching on x87 comparisons yet. This fixes PR7624.

llvm-svn: 108149

llvm-svn: 108130

llvm-svn: 108123

AggressiveAntiDepBreaker should not be using getPhysicalRegisterRegClass. An
instruction might be using a register that can only be replaced with one from
a subclass of getPhysicalRegisterRegClass.

With this patch we use getMinimalPhysRegClass. This is correct, but
conservative. We should check the uses of the register and select the
largest register class that can be used in all of them.

llvm-svn: 108122

This fixes PR7375.

llvm-svn: 108120

getMinimalPhysRegClass. It was used to produce spills, and it is better to
use the most specific class if possible.

Update getLoadStoreRegOpcode to handle GR32_AD.

llvm-svn: 108115

The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.

llvm-svn: 108099

operations in x87 code.

llvm-svn: 108098

llvm-svn: 108097

We are generating movaps for all XMM register copies, including scalar
floating point values. This is known to be at least as good as movss and movsd
for all known architectures up to and including Nehalem because it avoids a
partial register stall.

The SSEDomainFix pass will switch movaps to movdqa when appropriate (i.e., when
operands come from the integer unit). We don't now that switching movaps to
movapd has any benefit.

The same applies to andps -> pand.

llvm-svn: 108096

llvm-svn: 108094

llvm-svn: 108092

llvm-svn: 108091

assert()s, switching to void-casts. Removed an unneeded Compiler.h include as
a result. There are two other uses in LLVM, but they're not due to assert()s,
so I've left them alone.

llvm-svn: 108088

llvm-svn: 108087

llvm-svn: 108086

llvm-svn: 108084

llvm-svn: 108083

llvm-svn: 108082

llvm-svn: 108081

llvm-svn: 108080

llvm-svn: 108079

llvm-svn: 108078

llvm-svn: 108077

llvm-svn: 108076

Don't try a cross-class copy. That is very unlikely anywy since return value
registers are usually register class friendly. (%EAX, %XMM0, etc).

llvm-svn: 108074