- Apr 06, 2011
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Jim Grosbach authored
llvm-svn: 128959
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Johnny Chen authored
encodings for DisassembleArithMiscFrm(). rdar://problem/9238659 llvm-svn: 128958
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Chris Lattner authored
llvm-svn: 128955
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Chris Lattner authored
it already is. llvm-svn: 128954
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Bob Wilson authored
llvm-svn: 128953
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Chandler Carruth authored
this class. Clang was warning on this with -Wnon-virtual-dtor. llvm-svn: 128952
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Owen Anderson authored
llvm-svn: 128951
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Johnny Chen authored
Qd -> bit[12] == 0 Qn -> bit[16] == 0 Qm -> bit[0] == 0 If one of these bits is 1, the instruction is UNDEFINED. rdar://problem/9238399 rdar://problem/9238445 llvm-svn: 128949
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Devang Patel authored
llvm-svn: 128947
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Owen Anderson authored
llvm-svn: 128946
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Johnny Chen authored
Added checks for regs which should not be 15. rdar://problem/9237734 llvm-svn: 128945
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- Apr 05, 2011
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Chris Lattner authored
still used by RegionInfo :( llvm-svn: 128943
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NAKAMURA Takumi authored
It would be better to browse without stylesheet. (eg. on ViewVC) llvm-svn: 128942
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Johnny Chen authored
For register-controlled shifts, we should check that the encoding constraint Inst{7} = 0 and Inst{4} = 1 is satisfied. rdar://problem/9237693 llvm-svn: 128941
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Owen Anderson authored
Fix bugs in the pseuo-ization of ADCS/SBCS pointed out by Jim, as well as doing the expansion earlier (using a custom inserter) to allow for the chance of predicating these instructions. llvm-svn: 128940
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Chris Lattner authored
llvm-svn: 128938
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Jakob Stoklund Olesen authored
llvm-svn: 128936
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Jakob Stoklund Olesen authored
llvm-svn: 128935
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Chris Lattner authored
llvm-svn: 128933
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Devang Patel authored
llvm-svn: 128929
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Jakob Stoklund Olesen authored
llvm-svn: 128927
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Bob Wilson authored
of a basic block. llvm-svn: 128925
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Nick Lewycky authored
llvm-svn: 128924
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Johnny Chen authored
Modify DisassembleCoprocessor() of ARMDisassemblerCore.cpp to react to the change. rdar://problem/9236873 llvm-svn: 128922
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Roman Divacky authored
llvm-svn: 128920
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Jakob Stoklund Olesen authored
llvm-svn: 128919
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Jakob Stoklund Olesen authored
When dead code elimination removes all but one use, try to fold the single def into the remaining use. Rematerialization can leave single-use loads behind that we might as well fold whenever possible. llvm-svn: 128918
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Devang Patel authored
llvm-svn: 128914
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Johnny Chen authored
llvm-svn: 128913
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Andrew Trick authored
llvm-svn: 128912
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Andrew Trick authored
developers can see if their driver changed any cl::Option's. The current implementation isn't perfect but handles most kinds of options. This is nice to have when decomposing the stages of compilation and moving between different drivers. It's also a good sanity check when comparing results produced by different command line invocations that are expected to produce the comparable results. Note: This is not an attempt to prolong the life of cl::Option. On the contrary, it's a placeholder for a feature that must exist when cl::Option is replaced by a more appropriate framework. A new framework needs: a central option registry, dynamic name lookup, non-global containers of option values (e.g. per-module, per-function), *and* the ability to print options values and their defaults at any point during compilation. llvm-svn: 128910
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Johnny Chen authored
llvm-svn: 128909
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Johnny Chen authored
llvm-svn: 128906
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Andrew Trick authored
llvm-svn: 128905
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Shantonu Sen authored
getEDInfo(), in which case this code would dereference NULL. EDInst can already handle NULL info, so avoid the dereference and pass NULL through. Reviewed by Sean Callanan llvm-svn: 128904
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Jim Grosbach authored
Finish what r128736 started. llvm-svn: 128903
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Chris Lattner authored
llvm-svn: 128902
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Johnny Chen authored
An alternative syntax is available for a modified immediate constant that permits the programmer to specify the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where: <byte> is the numeric value of abcdefgh, in the range 0-255 <rot> is twice the numeric value of rotation, an even number in the range 0-30. llvm-svn: 128897
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Johnny Chen authored
if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE; if dHi == dLo then UNPREDICTABLE; rdar://problem/9230202 llvm-svn: 128895
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Owen Anderson authored
Convert ADCS and SBCS instructions into pseudos that are expanded to the ADC/ABC with the appropriate S-bit input value. llvm-svn: 128892
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