llvm-svn: 55047

llvm-svn: 55029

Just expand it like the other X-bit sub_and_fetches.

llvm-svn: 55023

was already present, but not hooked up to anything.

llvm-svn: 55018

llvm-svn: 55011

llvm-svn: 55010

builtins on X86.

Change "lock" instructions to be on a separate line.
This is needed to work around a bug in the Darwin
assembler.

llvm-svn: 54999

llvm-svn: 54964

llvm-svn: 54950

Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return junk in higher bits. Patch by Nate Begeman.

llvm-svn: 54903

- update VC projects.
- Add an overload to llvm::Stream for <<, since std::hex and std::dec have type std::ios_base& (*)(std::ios_base&) in VC++. (templating the function don't work, due to ambiguities)
- add ../ on several include in X86/AsmPrinter/

llvm-svn: 54898

Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this)

llvm-svn: 54886

llvm-svn: 54845

Reduce heap trashing due to std::string construction / concatenation via caching of section flags string representations

llvm-svn: 54842

llvm-svn: 54806

llvm-svn: 54803

Convert uses of std::vector in TargetInstrInfo to SmallVector.  This change had to be propoagated down into all the targets and up into all clients of this API.

llvm-svn: 54802

element inserts with non-constant indices. This fixes
CodeGen/X86/vector-variable-idx.ll on machines that
have SSE4.1.

llvm-svn: 54801

llvm-svn: 54787

llvm-svn: 54750

rather than the absolute address if the target is within range.

llvm-svn: 54708

llvm-svn: 54700

non_lazy_ptr mechanism on x86-64 Darwin JIT.  Fixes a bunch
of last night's failures.

llvm-svn: 54692

model, except for external calls; this makes
addressing modes PC-relative.  Incomplete.

The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.

llvm-svn: 54656

X86ISelLowering creates.

llvm-svn: 54544

llvm-svn: 54542

llvm-svn: 54540

llvm-svn: 54518

llvm-svn: 54461

llvm-svn: 54458

LowerSubregs, and fix an x86-64 isel bug that this exposed.

SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.

llvm-svn: 54444

this time using MOV32to32_ and MOV16to16_. Thanks to Evan for
suggesting this.

llvm-svn: 54418

llvm-svn: 54411

llvm-svn: 54376

llvm-svn: 54329

llvm-svn: 54314

subreg form on x86-64, to avoid the problem with x86-32
having GPRs that don't have 8-bit subregs.

Also, change several 16-bit instructions to use 
equivalent 32-bit instructions. These have a smaller
encoding and avoid partial-register updates.

llvm-svn: 54223

llvm-svn: 54148

which is represented in codegen as an 'and' operation. This matches them
with movz instructions, instead of leaving them to be matched by and
instructions with an immediate field.

llvm-svn: 54147

llvm-svn: 54128