operand widths to the Intel instruction tables, for
the purposes of the disassembler.

llvm-svn: 81601

like:
foo.s:2412:non-relocatable subtraction expression, "_gomp_tls_key" minus "L1$pb"

llvm-svn: 81596

because the sorting wasn't sorting.

llvm-svn: 81592

64-bit variants for the disassembler.

llvm-svn: 81591

llvm-svn: 81577

on rAX and an immediate.

llvm-svn: 81551

llvm-svn: 81544

llvm-svn: 81541

llvm-svn: 81532

llvm-svn: 81514

densemap instead of StringMap to match FnStubs.

llvm-svn: 81513

more efficient SmallPtrSet<MCSymbol*>.  This eliminates string
craziness and fixes CodeGen/X86/darwin-quote.ll with the new asmprinter.

Codegen is producing stubs in a nondeterminstic order, but it was doing
this before anyway.

llvm-svn: 81511

for the two instruction MOVPC32r sequence.

llvm-svn: 81509

Mangler::getNameWithPrefix.  In addition to avoiding some over
quoting, this also is more efficient because it uses smallvector
instead of std::string thrashing.

llvm-svn: 81508

instead of std::string and Mangler.

llvm-svn: 81503

llvm-svn: 81502

Follow up to 81494. When the folded reload is narrowed to a 32-bit load then change the destination register to a 32-bit one or add a sub-register index.

llvm-svn: 81496

It's not legal to fold a load from a narrower stack slot into a wider instruction. If done, the instruction does a 64-bit load and that's not
safe. This can happen we a subreg_to_reg 0 has been coalesced. One
exception is when the instruction that folds the load is a move, then we
can simply turn it into a 32-bit load from the stack slot.                                                                                                                    

rdar://7170444

llvm-svn: 81494

that things like .word can be parsed as target specific.  Moved parsing .word
out of AsmParser.cpp into X86AsmParser.cpp as it is 2 bytes on X86 and 4 bytes
for other targets that support the .word directive.

llvm-svn: 81461

various widths.

llvm-svn: 81458

including segment offsets and (for 8-bit operands)
absolute offsets.

llvm-svn: 81457

ones capable of accessing R/M operands instead of just
registers.

llvm-svn: 81456

the MCInst path of the asmprinter.  Instead, pull comment printing
out of the autogenerated asmprinter into each target that uses the
autogenerated asmprinter.  This causes code duplication into each
target, but in a way that will be easier to clean up later when more
asmprinter stuff is commonized into the base AsmPrinter class.

This also fixes an xcore strangeness where it inserted two tabs
before every instruction.

llvm-svn: 81396

new asmprinter.  Differently gross hack coming next.

llvm-svn: 81379

asm printer into the "printInstruction" routine.  This
fixes a problem where the experimental asmprinter would
drop debug labels in some cases, and fixes issues on ppc/xcore
where pseudo instructions like "mr" didn't get debug locs properly.

It is annoying that this moves the call from one place into each
target, but a future set of more invasive refactorings will fix
that problem.

llvm-svn: 81377

printing stuff are quoting symbols now, breaking objc testcases.

llvm-svn: 81319

expect the slight syntax differences in the generated code.

llvm-svn: 81305

llvm-svn: 81304

this fixes mingw-alloca.ll with the new asmprinter.

llvm-svn: 81301

x86-64-pic-11.ll with the new asmprinter.

llvm-svn: 81294

to instructions instead of zero extended ones.  This makes the asmprinter
print signed values more consistently.  This apparently only really affects
the X86 backend.

llvm-svn: 81265

llvm-svn: 81206

llvm-svn: 81199

in the .td files.  This gets us down to 18 failures in codegen/x86 with the
new asmprinter.

llvm-svn: 81198

subreg32 modifiers.

llvm-svn: 81196

the problem with subreg32 modifiers.  This gets all of Olden working
with the new asmprinter.

llvm-svn: 81195

depth first order, so it wouldn't process unreachable blocks.
When compiling at -O0, late dead block elimination isn't done
and the bad instructions got to isel.

llvm-svn: 81187

dependent. Hopefully, this will fix PR3801.

llvm-svn: 81132

llvm-svn: 81128

llvm-svn: 81126