llvm-svn: 146568

llvm-svn: 146566

  to finalize MI bundles (i.e. add BUNDLE instruction and computing register def
  and use lists of the BUNDLE instruction) and a pass to unpack bundles.
- Teach more of MachineBasic and MachineInstr methods to be bundle aware.
- Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to
  prevent IT blocks from being broken apart.

llvm-svn: 146542

load and then move the result from a GPR to a FPR.

llvm-svn: 146502

generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026

rdar://10528060

llvm-svn: 145891

llvm-svn: 145783

rdar://10510150

llvm-svn: 145742

change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.

llvm-svn: 145714

argument value type.  Otherwise, the sign/zero-extend has no effect on arguments
passed via the stack (i.e., undefined high-order bits).
rdar://10515467

llvm-svn: 145701

uninitialized: GCC doesn't understand that the variables are only used
if !UseImm, in which case they have been initialized.

llvm-svn: 145239

llvm-svn: 144959

llvm-svn: 144920

llvm-svn: 144888

rdar://10456186

llvm-svn: 144872

operands into a register.  Otherwise, we may materialize dead code.

llvm-svn: 144805

llvm-svn: 144743

llvm-svn: 144631

violating a dependency is to emit all loads prior to stores.  This would likely
cause a great deal of spillage offsetting any potential gains.

llvm-svn: 144585

rdar://10412592

llvm-svn: 144578

into registers, rather then encoded directly in the load/store.

llvm-svn: 144576

rdar://10412592

llvm-svn: 144565

offsets.
rdar://10412592

llvm-svn: 144518

The order in which the predicate is added differs between Thumb and ARM mode.  Fix predicate when in ARM mode and restore SelectIntrinsicCall.

llvm-svn: 144494

llvm-svn: 144492

llvm-svn: 144490

SimplifyAddress to handle either a 12-bit unsigned offset or the ARM +/-imm8
offsets (addressing mode 3).  This enables a load followed by an integer 
extend to be folded into a single load.

For example:
ldrb r1, [r0]       ldrb r1, [r0]
uxtb r2, r1     =>
mov  r3, r2         mov  r3, r1

llvm-svn: 144488

llvm-svn: 144426

llvm-svn: 144377

rdar://10412592

llvm-svn: 144376

llvm-svn: 144356

rdar://10412592

llvm-svn: 144348

For correctness, disable this for now.
rdar://10418009

llvm-svn: 144316

determine if the value is negative and flip the sign accordingly.
rdar://10422026

llvm-svn: 144258

rdar://10418009

llvm-svn: 144213

remove a fair number of unnecessary materialized constants.
rdar://10412592

llvm-svn: 144163

No functional change intended.

llvm-svn: 144122

callee's responsibility to sign or zero-extend the return value.  The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).

llvm-svn: 144047

zero-extend the constant integer encoding.  Test case provides testing for
both call parameters and materialization of i1, i8, and i16 types.

llvm-svn: 143821

llvm-svn: 143749