llvm-svn: 275826

This is not compliant with the official ABI, but allows experimentation
with calling conventions.

llvm-svn: 275825

llvm-svn: 275824

Currently we only decode broadcasts from a vector of the same size.

llvm-svn: 275823

This is compliant with the official ABI, but allows experimentation with
calling conventions.

llvm-svn: 275822

llvm-svn: 275821

This checker checks copy and move assignment operators whether they are
protected against self-assignment. Since C++ core guidelines discourages
explicit checking for `&rhs==this` in general we take a different approach: in
top-frame analysis we branch the exploded graph for two cases, where &rhs==this
and &rhs!=this and let existing checkers (e.g. unix.Malloc) do the rest of the
work. It is important that we check all copy and move assignment operator in top
frame even if we checked them already since self-assignments may happen
undetected even in the same translation unit (e.g. using random indices for an
array what may or may not be the same).

A patch by Ádám Balogh!

Differential Revision: https://reviews.llvm.org/D19311

llvm-svn: 275820

Don't use pthread initializers in constexpr constructors. Patch by elram. Reviewed at https://reviews.llvm.org/D21637.

llvm-svn: 275819

DAGTypeLegalizer::CanSkipSoftenFloatOperand should allow
SELECT op code for x86_64 fp128 type for MME targets,
so SoftenFloatOperand does not abort on SELECT op code.

Differential Revision: http://reviews.llvm.org/D21758

llvm-svn: 275818

llvm-svn: 275817

It is breaking build 32-bit build bots.

llvm-svn: 275816

We negated a value with a signed type which invited problems when that
value was the most negative signed number.  Use an unsigned type
for the value instead.  It will compute the same twos complement
result without the UB.

llvm-svn: 275815

llvm-svn: 275814

It didn't really work on r600 to begin with, which should
get its own intrinsic.

llvm-svn: 275813

Only its counterpart, diagnostics-with-hotness-lazy-BFI.ll, which
invokes opt with -debug-only=.

llvm-svn: 275812

Summary:
The direct motivation for the port is to ensure that the OptRemarkEmitter
tests work with the new PM.

This remains a function pass because we not only create multiple loops
but could also version the original loop.

In the test I need to invoke opt
with -passes='require<aa>,loop-distribute'.  LoopDistribute does not
directly depend on AA however LAA does.  LAA uses getCachedResult so
I *think* we need manually pull in 'aa'.

Reviewers: davidxl, silvas

Subscribers: sanjoy, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D22437

llvm-svn: 275811

Summary:
The main goal is to able to start using the new OptRemarkEmitter
analysis from the LoopVectorizer.  Since the vectorizer was recently
converted to the new PM, it makes sense to convert this analysis as
well.

This pass is currently tested through the LoopDistribution pass, so I am
also porting LoopDistribution to get coverage for this analysis with the
new PM.

Reviewers: davidxl, silvas

Subscribers: llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D22436

llvm-svn: 275810

llvm-svn: 275809

We don't yet decode broadcasts as a target shuffle

llvm-svn: 275808

 .. into reusable interfaces. No functional change is expected.

llvm-svn: 275807

- Remove duplicated code.
- Convert loop to range-for.

llvm-svn: 275806

target_parallel_for_simd_collapse_messages.cpp and target_parallel_for_simd_ordered_messages.cpp give different diagnostic messages in compiling with -std=c++11. The test cases are updated to make it compatible.

Differential Revision: https://reviews.llvm.org/D22417

llvm-svn: 275805

Schedule a load and its use in the same packet in MISched. Previously,
isResourceAvailable was returning false for dependences in the same
packet, which prevented MISched from packetizing a load and its use in
the same packet for v60.

Patch by Ikhlas Ajbar.

llvm-svn: 275804

llvm-svn: 275803

Causes https://llvm.org/bugs/show_bug.cgi?id=28588

llvm-svn: 275801

Patch by Sergei Larin.

llvm-svn: 275799

Initialize the list of references to a GPU array to ensure that the arrays that
need to be passed to kernel calls are computed correctly.  Furthermore, the very
same information is also necessary to compute synchronization correctly. As the
functionality to compute these references is already available, what is left for
us to do is only to connect the necessary functionality to compute array
reference information.

llvm-svn: 275798

This will allow us to see the full class definition even after we add
non-trivial implementations of the different member functions.

llvm-svn: 275797

This patch corresponds to review:
https://reviews.llvm.org/D21354

We use direct moves for extracting integer elements from vectors. We also use
direct moves when converting integers to FP. When these operations are chained,
we get a direct move out of a VSR followed by a direct move back into a VSR.
These are redundant - all we need to do is line up the element and convert.

llvm-svn: 275796

Add parseToken and compatriot functions to stitch error checks in
straight linear code. As part of this fix some erronous handling of
directives where the EndOfStatement token either was not checked or
Lexed on termination.

Reviewers: rnk, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D22312

llvm-svn: 275795

Patch by Sirish Pande.

llvm-svn: 275794

The machine scheduler needs to account for available resources
more accurately in order to avoid scheduling an instruction that
forces a new packet to be created.

This occurs in two ways: First, an instruction without an available
resource may have a large priority due to other metrics and be
scheduled when there are other instructions with available resources.
Second, an instruction with a non-zero latency may become available
prematurely. In both these cases, we attempt change the priority
in order to allow a better instruction to be scheduled.

Patch by Brendon Cahoon.

llvm-svn: 275793

This patch adds 48-bits VMA support for asan on aarch64. The current
47-bit mask is not suffice since on aarch64 kernel with 48-bit vma
(default on ubuntu 16.04) the process may use full VMA range as:

[...]
ffffa39a7000-ffffa39a8000 r--p 00000000 00:00 0 [vvar]
ffffa39a8000-ffffa39a9000 r-xp 00000000 00:00 0 [vdso]
ffffa39a9000-ffffa39aa000 r--p 0001c000 08:02 13631554 /lib/aarch64-linux-gnu/ld-2.23.so
ffffa39aa000-ffffa39ac000 rw-p 0001d000 08:02 13631554 /lib/aarch64-linux-gnu/ld-2.23.so
ffffc2227000-ffffc2248000 rw-p 00000000 00:00 0 [stack]

llvm-svn: 275792

This reverts r275782.

The problem with the commit is that it reports an additional "exit (1)" error for every file
containing a failing test, which is far more than I had intended to do. I'll need to come up with
a more fine-grained way of achieving the result.

llvm-svn: 275791

An instruction may have multiple predecessors that are candidates
for using .cur. However, only one of them can use .cur in the
packet. When this case occurs, we need to make sure that only
one of the dependences gets a 0 latency value.

Patch by Brendon Cahoon.

llvm-svn: 275790

llvm-svn: 275789

llvm-svn: 275788

Change a couple ifdefs from '#if __cplusplus >= 2011xxx' to '#ifndef _LIBCPP_CXX03_LANG'. No functionality change.

llvm-svn: 275787

When SelectionDAGISel transforms a node representing an inline asm
block, memory constraint information is not preserved. This can cause
constraints to be broken when a memory offset is of the form:

offset + frame index

when the frame is resolved.

By propagating the constraints all the way to the backend, targets can
enforce memory operands of inline assembly to conform to their constraints.

For MIPSR6, some instructions had their offsets reduced to 9 bits from
16 bits such as ll/sc. This becomes problematic when using inline assembly
to perform atomic operations, as an offset can generated that is too big to
encode in the instruction.

Reviewers: dsanders, vkalintris

Differential Review: https://reviews.llvm.org/D21615

llvm-svn: 275786

Reviewers: jaydeep

Subscribers: bhushan, mohit.bhakkad, slthakur, llvm-commits
llvm-svn: 275785