Commits · 17d277b7346b6cfcd236e5c12a34f25cf7c72a73 · Roger Ferrer / llvm-epi · GitLab

Nov 28, 2017
- [mir] Print/Parse both MOLoad and MOStore when they occur together. · 17d277b7
  Daniel Sanders authored Nov 28, 2017
  17d277b7
- [CUDA] Report "unsupported VLA" errors only on device side. · 50e6e545
  Artem Belevich authored Nov 28, 2017
  50e6e545
- Fix non assert build warnings. · bba7f862
  Rafael Espindola authored Nov 28, 2017
  bba7f862
- EntryExitInstrumenter: set DebugLocs on the inserted call instructions (PR35412) · ca46db95
  Hans Wennborg authored Nov 28, 2017
  ca46db95
- [CodeView] Refactor / Rewrite TypeSerializer and TypeTableBuilder. · 6900de1d
  Zachary Turner authored Nov 28, 2017
  6900de1d
- [X86][X87] Tag FP_TO_INT_IN_MEM pseudos with hasNoSchedulingInfo · 4fecbd88
  Simon Pilgrim authored Nov 28, 2017
  4fecbd88
- Handle binding in --wrap. · b45c164f
  Rafael Espindola authored Nov 28, 2017
  b45c164f
- [Target] Make a copy of TargetOptions feature list before sorting during CodeGen · b3384001
  Craig Topper authored Nov 28, 2017
  b3384001
- [CodeGen] Separate MachineOperand implementation from MachineInstr · aa739695
  Francis Visoiu Mistrih authored Nov 28, 2017
  aa739695
- [CodeGen] Cleanup MachineOperand · 946e394e
  Francis Visoiu Mistrih authored Nov 28, 2017
  946e394e
- AMDGPU: Add num spilled s/vgprs to metadata · 06ae4ec7
  Konstantin Zhuravlyov authored Nov 28, 2017
  06ae4ec7
- Simplify UUID constructors · 50112989
  Stephane Sezer authored Nov 28, 2017
  50112989
- [LibFuzzer] Improve comments on `CounterToFeature()` function. · 37516b52
  Dan Liew authored Nov 28, 2017
  37516b52
- Support the setjmp(3) family of functions in TSan/NetBSD · 4e9e9bf0
  Kamil Rytarowski authored Nov 28, 2017
  4e9e9bf0
- Add opt-viewer testing · 353f7cbc
  Adam Nemet authored Nov 28, 2017
  353f7cbc
- [CodeGen] Print register names in lowercase in both MIR and debug output · 9d7bb0cb
  Francis Visoiu Mistrih authored Nov 28, 2017
  9d7bb0cb
- [WebAssembly] Support bitcasted function addresses with varargs. · 2803bfaf
  Dan Gohman authored Nov 28, 2017
  2803bfaf
- DAG: Legalize truncstores to illegal int types · e123aba9
  Matt Arsenault authored Nov 28, 2017
  e123aba9
- [X86][X87] Tag FTST x87 instruction scheduler class · ece5bc35
  Simon Pilgrim authored Nov 28, 2017
  ece5bc35
- [clang-tidy] Move more checks from misc- to performance- · 1bfcba8c
  Alexander Kornienko authored Nov 28, 2017
  1bfcba8c
- [InstCombine] add tests from D39421 to show current transforms; NFC · 14230e02
  Sanjay Patel authored Nov 28, 2017
  14230e02
- [PowerPC][tsan] Update tsan to handle changed memory layouts in newer kernels · 785294d4
  Bill Seurer authored Nov 28, 2017
  785294d4
- Refactor functions PrintTemplateArgumentList · 03e672cc
  Serge Pavlov authored Nov 28, 2017
  03e672cc
- [Support] Add unit test for printLowerCase · 14bd3b9f
  Francis Visoiu Mistrih authored Nov 28, 2017
  14bd3b9f
- [cmake] Remove redundant call to cmake when building host tools. · 17fdf32c
  Don Hinton authored Nov 28, 2017
  17fdf32c
- [X86][X87] Tag FABS/FCHS/FSQRT/FSIN/FCOS x87 instruction scheduler classes · 0747a7e8
  Simon Pilgrim authored Nov 28, 2017
  0747a7e8
- [clang-tidy] Ignore ExprWithCleanups when looking for else-after-throw · 91e2c2ad
  Malcolm Parsons authored Nov 28, 2017
  91e2c2ad
- Use getStoreSize() in various places instead of 'BitSize >> 3'. · f0ff20f1
  Jonas Paulsson authored Nov 28, 2017
  f0ff20f1
- [X86][X86] Add some x87 schedule tests · b843dc26
  Simon Pilgrim authored Nov 28, 2017
  b843dc26
- [Support] Merge toLower / toUpper implementations · 26d6fc1f
  Francis Visoiu Mistrih authored Nov 28, 2017
  26d6fc1f
- [clang-tidy] Fix tests for ReplaceRandomShuffleCheck · 61d39595
  Gabor Horvath authored Nov 28, 2017
  61d39595
- [ELF] Read ARM BuildAttributes section to determine supported features. · 57eb0469
  Peter Smith authored Nov 28, 2017
  57eb0469
- [CodeGen] Rename functions PrintReg* to printReg* · 9d419d3b
  Francis Visoiu Mistrih authored Nov 28, 2017
  9d419d3b
- [X86][3DNow] Add instruction itinerary and scheduling classes for femms/prefetch/prefetchw · 8dc603b0
  Simon Pilgrim authored Nov 28, 2017
  8dc603b0
- [ARM][AArch64] Workaround ARM/AArch64 peculiarity in clearing icache. · a939257a
  Peter Smith authored Nov 28, 2017
  a939257a
- [XRay][compiler-rt][Darwin] Minimal XRay build support in Darwin · 542485f2
  Dean Michael Berris authored Nov 28, 2017
  542485f2
- Add a new pass to speculate around PHI nodes with constant (integer) operands when profitable. · c34f789e
  Chandler Carruth authored Nov 28, 2017
  c34f789e
- Correct mangled_sp on NetBSD/amd64 in TSan · b789ab35
  Kamil Rytarowski authored Nov 28, 2017
  b789ab35
- elf-core: Convert remaining register context to use register set maps · bc8cc867
  Pavel Labath authored Nov 28, 2017
  bc8cc867
- Fix floating point register write on new x86 linux kernels · d2cfe0e5
  Pavel Labath authored Nov 28, 2017
  d2cfe0e5