Commits · 2f17ed294fcd8cde505b93c9c5bbab06ba59051c · Roger Ferrer / llvm-epi · GitLab

Feb 19, 2021
- [DCE] Don't remove non-willreturn calls · 2f17ed29
  Nikita Popov authored Feb 18, 2021
  2f17ed29
- [flang][driver] Add debug measure-parse-tree and pre-fir-tree options · 529f7181
  Faris Rehman authored Feb 17, 2021
  529f7181
- Remove unnecessary "using namespace llvm" inside "namespace llvm". NFCI. · aa44815f
  Simon Pilgrim authored Feb 19, 2021
  
  aa44815f
- [X86][AVX] getFauxShuffleMask - decode VBROADCAST(EXTRACT_VECTOR_ELT(V,0)) · 2258b367
  Simon Pilgrim authored Feb 19, 2021
  2258b367
- [IR] Move willReturn() to Instruction · 370addb9
  Nikita Popov authored Feb 18, 2021
  370addb9
- [BasicAA] Add simple depth limit to avoid stack overflow (PR49151) · 1d9f4903
  Nikita Popov authored Feb 18, 2021
  1d9f4903
- [mlir] Add a TensorLoadToMemref canonicalization · d12fa33d
  Nicolas Vasilache authored Feb 19, 2021
  d12fa33d
- [docs] Fix the GlobalISel/GenericOpcode.rst · 0d829802
  Djordje Todorovic authored Feb 19, 2021
  0d829802
- [X86] Fix a codegen crash in getSetCCResultType · c98644c2
  Wang, Pengfei authored Feb 19, 2021
  c98644c2
- [AArch64] Add some missing Neoverse features · 260f90bb
  Sjoerd Meijer authored Feb 18, 2021
  260f90bb
- [llvm-exegesis] Ignore instructions using custom inserter · 9d2f0644
  Qiu Chaofan authored Feb 19, 2021
  9d2f0644
- [llvm-exegesis] [PowerPC] Add basic LIT test · d7d4dca1
  Qiu Chaofan authored Feb 19, 2021
  d7d4dca1
- [debuginfo-tests] Recommit test sret.cpp · 54b6d016
  OCHyams authored Feb 19, 2021
  54b6d016
- [NPM][LTO] Do not enable MemorySSA with LoopFullUnrollPass · c141c655
  David Green authored Feb 19, 2021
  c141c655
- [mlir] Better support for rank-reducing subview / subtensor type inference. · b3c227a2
  Nicolas Vasilache authored Feb 18, 2021
  b3c227a2
- Reland "[Debugify] Make the debugify aware of the original (-g) Debug Info" · 1a2b3536
  Djordje Todorovic authored Feb 18, 2021
  1a2b3536
- LanguageRuntime can provide an UnwindPlan for special occasions · d82ecb0a
  Jason Molenda authored Feb 18, 2021
  d82ecb0a
- [mlir][sparse] assert fail on mismatch between rank and annotations array · 2556d622
  Aart Bik authored Feb 18, 2021
  2556d622
- [RISCV] Prune unneeded indexed load/store pseudo instructions. · cd4051ac
  Craig Topper authored Feb 18, 2021
  cd4051ac
- [CodeGen] Use range-based for loops (NFC) · fd04f3a3
  Kazu Hirata authored Feb 18, 2021
  
  fd04f3a3
- [Support] Use static_assert instead of assert (NFC) · 2d5eb672
  Kazu Hirata authored Feb 18, 2021
  2d5eb672
- [TableGen] Use ListSeparator (NFC) · 744a96af
  Kazu Hirata authored Feb 18, 2021
  
  744a96af
- [mlir] Load dynamic libraries in JitRunner from absolute paths so that GDB can... · c86c96a7
  Christian Sigg authored Feb 18, 2021
  c86c96a7
- [FPEnv][AArch64] Implement lowering of llvm.set.rounding · 2c4f60e4
  Serge Pavlov authored Feb 16, 2021
  2c4f60e4
- [libc++] shared_ptr deleter requirements (LWG 2802). · 6a328c66
  zoecarver authored Feb 18, 2021
  6a328c66
- Mark 2534 as Complete. · 82b82b94
  zoecarver authored Feb 18, 2021
  82b82b94
- [HIP] Support device sanitizer · 51ade31e
  Yaxun (Sam) Liu authored Feb 16, 2021
  51ade31e
- [ORC] Print CPU feature string in JITTargetMachineBuilder debugging output. · 0469256d
  Lang Hames authored Feb 19, 2021
  
  0469256d
- [RISCV] Remove redundant test cases for index segment store (8/8). · 0ab3558b
  Hsiangkai Wang authored Feb 19, 2021
  0ab3558b
- [RISCV] Remove redundant test cases for index segment store (7/8). · c2f27da7
  Hsiangkai Wang authored Feb 19, 2021
  c2f27da7
- [RISCV] Remove redundant test cases for index segment store (6/8). · b0168a38
  Hsiangkai Wang authored Feb 19, 2021
  b0168a38
- [RISCV] Remove redundant test cases for index segment store (5/8). · de6d640f
  Hsiangkai Wang authored Feb 19, 2021
  de6d640f
- [RISCV] Remove redundant test cases for index segment load (4/8). · 3b4b1c84
  Hsiangkai Wang authored Feb 19, 2021
  
  3b4b1c84
- [RISCV] Remove redundant test cases for index segment load (3/8). · 8cc0b1cb
  Hsiangkai Wang authored Feb 19, 2021
  8cc0b1cb
- [RISCV] Remove redundant test cases for index segment load (2/8). · 320250e4
  Hsiangkai Wang authored Feb 19, 2021
  
  320250e4
- [RISCV] Remove redundant test cases for index segment load (1/8). · a32c79ce
  Hsiangkai Wang authored Feb 19, 2021
  a32c79ce
- [Coroutine] Relax CoroElide musttail check · 3bf8f162
  Xun Li authored Feb 18, 2021
  3bf8f162
- [RISCV] Split zvlsseg searchable table into 4 separate tables. Index by... · 8ed3bbbc
  Craig Topper authored Feb 18, 2021
  8ed3bbbc
- [RISCV] Enable PrimaryKeyEarlyOut on RISCVVPseudosTable. · cf345591
  Craig Topper authored Feb 18, 2021
  cf345591
- Reset the EntryValue location flag in finalizeEntryValue. · c4ad878a
  Adrian Prantl authored Feb 18, 2021
  c4ad878a