Summary:
I found that there currently isn't a way to invoke exportToDot from
the command line for a per-module summary index, and therefore no
testing of that case. Add an internal option and use it to test dumping
of per module summary indexes.

In particular, I am looking at fixing the limitation that causes the
aliasee GUID in the per-module summary to be 0, and want to be able to
test that change.

Reviewers: evgeny777

Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D57206

llvm-svn: 352441

GEPs can produce either scalar or vector results. If we're extracting only a subset of the vector lanes, simplifying the operands is helpful in eliminating redundant computation, and (eventually) allowing further optimizations

Differential Revision: https://reviews.llvm.org/D57177

llvm-svn: 352440

llvm-svn: 352439

Summary:
A recent fix to the ThinLTO whole program dead code elimination (D56117)
increased the thin link time on a large MSAN'ed binary by 2x.
It's likely that the time increased elsewhere, but was more noticeable
here since it was already large and ended up timing out.

That change made it so we would repeatedly scan all copies of linkonce
symbols for liveness every time they were encountered during the graph
traversal. This was needed since we only mark one copy of an aliasee as
live when we encounter a live alias. This patch fixes the issue in a
more efficient manner by simply proactively visiting the aliasee (thus
marking all copies live) when we encounter a live alias.

Two notes: One, this requires a hash table lookup (finding the aliasee
summary in the index based on aliasee GUID). However, the impact of this
seems to be small compared to the original pre-D56117 thin link time. It
could be addressed if we keep the aliasee ValueInfo in the alias summary
instead of the aliasee GUID, which I am exploring in a separate patch.

Second, we only populate the aliasee GUID field when reading summaries
from bitcode (whether we are reading individual summaries and merging on
the fly to form the compiled index, or reading in a serialized combined
index). Thankfully, that's currently the only way we can get to this
code as we don't yet support reading summaries from LLVM assembly
directly into a tool that performs the thin link (they must be converted
to bitcode first). I added a FIXME, however I have the fix under test
already. The easiest fix is to simply populate this field always, which
isn't hard, but more likely the change I am exploring to store the
ValueInfo instead as described above will subsume this. I don't want to
hold up the regression fix for this though.

Reviewers: trentxintong

Subscribers: mehdi_amini, inglorion, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D57203

llvm-svn: 352438

llvm-svn: 352437

Summary:
When importing classes we may add a CXXMethodDecl more than once to a CXXRecordDecl when handling overrides. This patch will fix the cases we currently know about and handle the case where we are only dealing with declarations.

Differential Revision: https://reviews.llvm.org/D56936

llvm-svn: 352436

llvm-svn: 352435

This reverts commit r352394 because it broke three windows-specific tests.

llvm-svn: 352434

Recommit r352255 "[SelectionDAG][X86] Don't use SEXTLOAD for promoting masked loads in the type legalizer"

This did not cause the buildbot failure it was previously reverted for.

Original commit message:

I'm not sure why we were using SEXTLOAD. EXTLOAD seems more appropriate since we don't care about the upper bits.

This patch changes this and then modifies the X86 post legalization combine to emit a extending shuffle instead of a sign_extend_vector_inreg. Could maybe use an any_extend_vector_inre

On AVX512 targets I think we might be able to use a masked vpmovzx and not have to expand this at all.

llvm-svn: 352433

This patch tried to address the following use case.
  . bcc (https://github.com/iovisor/bcc

) utilizes llvm JIT to
    compile for BTF target.
  . with -g, .BTF and .BTF.ext sections (BPF debug info)
    will be generated by LLVM.
  . .BTF does not have relocations and .BTF.ext has some
    relocations.
  . With ProcessAllSections, .BTF.ext is loaded by JIT dynamic linker
    and is available to application. But .BTF is not loaded.

The bcc application needs both .BTF.ext and .BTF for debugging
purpose, and .BTF is not loaded. This patch addressed this issue
by iterating over all sections and loading any missing
sections, after symbol/relocation processing in loadObjectImpl().

Signed-off-by: Yonghong Song <yhs@fb.com>

Differential Revision: https://reviews.llvm.org/D55943

llvm-svn: 352432

Create ARMCallingConv.cpp and emit code for calling convention analysis
from there.

llvm-svn: 352431

Summary:
Avoids duplicating generated static helpers for calling convention
analysis.

This also means you can modify AArch64CallingConv.td without recompiling
the AArch64ISelLowering.cpp monolith, so it provides faster incremental
rebuilds.

Saves 12K in llc.exe, but adds a new object file, which is large.

Reviewers: efriedma, t.p.northover

Subscribers: mgorny, javed.absar, kristof.beyls, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D56948

llvm-svn: 352430

This adds support for legalizing G_FLOG into a RTLib call.

It adds a legalizer test, and updates the existing floating point tests.

https://reviews.llvm.org/D57347

llvm-svn: 352429

Many different sections can have the same name, so include the indices of the
sections mentioned in the diagnostic too.

I'm debugging something I can't repro locally, maybe this will help.

llvm-svn: 352428

This reverts commit r352384: this broke on ARM as UnwindCursor.hpp
still has some C++ library dependencies.

llvm-svn: 352427

glibc supports versioning, so it's possible to build against older
version and run against newer version. This is sometimes relied on
in practice, e.g. in Fuchsia build we build against older sysroot
(equivalent to Ubuntu Trusty) to cover the broadest possible range
of host systems, but that doesn't necessarily match the system that
binary is going to run on which may have newer version, in which case
the compile test used in curr_symbol is going to fail. Using runtime
check is more reliable.

Differential Revision: https://reviews.llvm.org/D56702

llvm-svn: 352425

I forgot that our undef matching hasn't been completed in the previous commit.

llvm-svn: 352424

llvm-svn: 352423

Since these pass the pointer in m0 unlike other DS instructions, these
need to worry about whether the address is uniform or not. This
assumes the address is dynamically uniform, and just uses
readfirstlane to get a copy into an SGPR.

I don't know if these have the same 16-bit add for the addressing mode
offset problem on SI or not, but I've just assumed they do.

Also includes some misc. changes to avoid test differences between the
LDS and GDS versions.

llvm-svn: 352422

In case of the empty module, the ptxas tool may emit error message about
empty debug info sections. This patch fixes this bug.

llvm-svn: 352421

gn build: Add get.py script to download prebuilt gn, make gn.py run downloaded gn if gn is not on PATH

Prebuilts are available for x86_64 Linux, macOS, Windows. The script always
pulls the latest GN version.

Differential Revision: https://reviews.llvm.org/D57256

llvm-svn: 352420

Differential Revision: https://reviews.llvm.org/D57338

llvm-svn: 352419

This adds instruction selection support for @llvm.log10 in AArch64. It teaches
GISel to lower it to a library call, updates the relevant tests, and adds a
legalizer test for log10.

https://reviews.llvm.org/D57341

llvm-svn: 352418

Looks like this was an unintended sideeffect of r124250.

Differential Revision: https://reviews.llvm.org/D57272

llvm-svn: 352417

llvm-svn: 352416

Fixes a minor regression from r351248.

While here, also make it possible to opt out of lld by saying
use_lld=false when clang_base_path is set. (use_lld still defaults to
true if clang_base_path is set.)

llvm-svn: 352415

This is allowed by GAS and seems correct.

Differential Revision: https://reviews.llvm.org/D55439

llvm-svn: 352414

Previously we were setting it to the GotPlt output section, which is
incorrect on ARM where this section is in .got. In static binaries
this can lead to sh_info being set to -1 (because there is no .got.plt)
which results in various tools rejecting the output file.

Differential Revision: https://reviews.llvm.org/D57274

llvm-svn: 352413

The 'apple-latest' alias is supposed to provide a CPU that contains the
latest Apple processor model supported by LLVM.

This is supposed to be used by tools like lldb to provide a target that
supports most of the CPU features.

For now, this is mapped to Cyclone.

Differential Revision: https://reviews.llvm.org/D56384

llvm-svn: 352412

This reverts commit r352341: it broke the build on macOS which doesn't
seem to provide __libc_start_main in its C library.

llvm-svn: 352411

This adds ISel support for lifetime markers in opt levels above O0.

It also updates the arm64-irtranslator test, and updates some AArch64 tests that
use them for added coverage.

It also adds a testcase taken from the X86 codegen tests which verified a bug
caused by lifetime markers + stack colouring in the past. This is intended to
make sure that GISel doesn't re-introduce the bug.

(This is basically a straight copy from what SelectionDAG does in
SelectionDAGBuilder.cpp)

https://reviews.llvm.org/D57187

llvm-svn: 352410

Followup to D56636, this time handling the UADDSAT case by expanding
uadd.sat(a, b) to umin(a, ~b) + b.

Differential Revision: https://reviews.llvm.org/D56869

llvm-svn: 352409

When passing a `swifterror` argument or alloca as an input to an
extraction region, mark the input parameter `swifterror`.

llvm-svn: 352408

llvm-svn: 352407

llvm-svn: 352406

llvm-svn: 352405

Summary:
"clang++ hello.cc --rtlib=compiler-rt"

now works without specifying additional unwind or exception
handling libraries.

Reviewers: rsmith

Subscribers: srhines, dberris, aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D57128

llvm-svn: 352404

This breaks GCC 4.8.4. Reported by email by Hans Wennborg.

llvm-svn: 352403

This contains all of the legalizer changes from D57197 necessary to select
G_FCOS and G_FSIN. It also updates several existing IR tests in
test/CodeGen/AArch64 that verify that we correctly lower the G_FCOS and G_FSIN
instructions.

https://reviews.llvm.org/D57197
3/3

llvm-svn: 352402

This adds IRTranslator support for the G_FCOS and G_FSIN generic instructions.

https://reviews.llvm.org/D57197
2/3

llvm-svn: 352401