Commits · 33f588acb9b1203451de4948ff6f0e8ae58c5516 · Roger Ferrer / llvm-epi · GitLab

Jul 20, 2018
- [AArch64][SVE] Asm: Support for bit/byte reverse operations. · 33f588ac
  Sander de Smalen authored Jul 20, 2018
  33f588ac
- [AArch64][SVE] Asm: Support for FTMAD instruction. · 3ed7f81c
  Sander de Smalen authored Jul 20, 2018
  3ed7f81c
- [WebAssembly] Disable a test that violates DR1696 · 022a37af
  Heejin Ahn authored Jul 20, 2018
  022a37af
- [x86/SLH] Clean up helper naming for return instruction handling and · a3a03ac2
  Chandler Carruth authored Jul 19, 2018
  a3a03ac2
Jul 19, 2018
- [X86][AVX] Use extract_subvector to reduce vector op widths (PR36761) · 1d181bc9
  Simon Pilgrim authored Jul 19, 2018
  1d181bc9
- [X86] Fix some 'return SDValue()' after DCI.CombineTo instead return the output of CombineTo · 9888670c
  Craig Topper authored Jul 19, 2018
  9888670c
- [Power9] Code Cleanup - Remove needsAggressiveScheduling() · 0c122d5a
  Stefan Pintilie authored Jul 19, 2018
  0c122d5a
- [X86][BtVer2] correctly model the latency/throughput of LEA instructions. · b6022aa8
  Andrea Di Biagio authored Jul 19, 2018
  b6022aa8
- ARM: switch armv7em MachO triple to hard-float defaults and libcalls. · a7c18ee8
  Tim Northover authored Jul 19, 2018
  a7c18ee8
- [x86/SLH] Major refactoring of SLH implementaiton. There are two big · 4b0028a3
  Chandler Carruth authored Jul 19, 2018
  4b0028a3
- Fix spelling mistake in comments. NFCI. · dd7bf598
  Simon Pilgrim authored Jul 19, 2018
  dd7bf598
Jul 18, 2018
- [WebAssembly] Add missing -mattr=+exception-handling guards · 47068a42
  Heejin Ahn authored Jul 18, 2018
  47068a42
- Revert "ARM: switch armv7em triple to hard-float defaults and libcalls." · da142d10
  Tim Northover authored Jul 18, 2018
  da142d10
- [X86][SSE] Canonicalize scalar fp arithmetic shuffle patterns · d4b82da1
  Simon Pilgrim authored Jul 18, 2018
  d4b82da1
- [mips] Fix predicate for the MipsTruncIntFP pattern · e9d7b319
  Simon Atanasyan authored Jul 18, 2018
  e9d7b319
- [X86][SSE] Remove BLENDPD canonicalization from combineTargetShuffle · 3a45369b
  Simon Pilgrim authored Jul 18, 2018
  3a45369b
- ARM: stop explicitly marking armv7k libcalls as hard-float. NFC. · e00cf4fc
  Tim Northover authored Jul 18, 2018
  e00cf4fc
- ARM: switch armv7em triple to hard-float defaults and libcalls. · d4abd14c
  Tim Northover authored Jul 18, 2018
  d4abd14c
- ARM: deduplicate hard-float detection code. NFC. · 097a3e3d
  Tim Northover authored Jul 18, 2018
  097a3e3d
- [AArch64][SVE] Asm: Support for unpredicated FP operations. · 330d887d
  Sander de Smalen authored Jul 18, 2018
  330d887d
- Revert "[Sparc] Use the IntPair reg class for r constraints with value type f64" · 959c8bf5
  Daniel Cederman authored Jul 18, 2018
  959c8bf5
- [AArch64][SVE] Asm: Support for UDOT/SDOT instructions. · ccdc7ebc
  Sander de Smalen authored Jul 18, 2018
  ccdc7ebc
- [Sparc] Use the IntPair reg class for r constraints with value type f64 · 4e38df18
  Daniel Cederman authored Jul 18, 2018
  4e38df18
- [AArch64][SVE] Asm: Integer divide instructions. · 889fe81c
  Sander de Smalen authored Jul 18, 2018
  889fe81c
- [AArch64][SVE] Asm: Support for integer MUL instructions. · ac0cb5bf
  Sander de Smalen authored Jul 18, 2018
  ac0cb5bf
- [X86] Enable commuting of VUNPCKHPD to VMOVLHPS to enable load folding by... · 92ea7a7b
  Craig Topper authored Jul 18, 2018
  92ea7a7b
- [NFC] fix trivial typos in comments · cd83d459
  Hiroshi Inoue authored Jul 18, 2018
  cd83d459
- Fix build failures from r337347, found by clang · 22e939a1
  Justin Hibbits authored Jul 18, 2018
  22e939a1
- [X86] Remove patterns that mix X86ISD::MOVLHPS/MOVHLPS with v2i64/v2f64 types. · 95063a45
  Craig Topper authored Jul 18, 2018
  95063a45
- [X86] Generate v2f64 X86ISD::UNPCKL/UNPCKH instead of X86ISD::MOVLHPS/MOVHLPS... · 1425e10c
  Craig Topper authored Jul 18, 2018
  1425e10c
- Introduce codegen for the Signal Processing Engine · d52990c7
  Justin Hibbits authored Jul 18, 2018
  d52990c7
- Complete the SPE instruction set patterns · 4fa4fa6a
  Justin Hibbits authored Jul 18, 2018
  4fa4fa6a
- Add PowerPC e500(v2) core scheduler and directives. · ceb3cd96
  Justin Hibbits authored Jul 18, 2018
  ceb3cd96
- [X86] Remove the vector alignment requirement from the patterns added in r337320. · a29f58dc
  Craig Topper authored Jul 17, 2018
  a29f58dc
Jul 17, 2018
- [X86] Add patterns for folding full vector load into MOVHPS and MOVLPS with SSE1 only. · 9ef92865
  Craig Topper authored Jul 17, 2018
  9ef92865
- [x86/SLH] Flesh out the data-invariant instruction table a bit based on feedback from Craig. · c0cb5731
  Chandler Carruth authored Jul 17, 2018
  c0cb5731
- [WebAssembly] Update WebAssemblyLowerEmscriptenEHSjLj to handle separate compilation · 28b3e994
  Sam Clegg authored Jul 17, 2018
  28b3e994
- [X86] Remove some standalone patterns in favor of the patterns in the MOVLPD... · 9187bca7
  Craig Topper authored Jul 17, 2018
  9187bca7
- [AArch64][SVE]: Integer multiply-add/subtract instructions. · 7b33faaf
  Sander de Smalen authored Jul 17, 2018
  7b33faaf
- [Mips][FastISel] Fix handling of icmp with i1 type · f10e4798
  Petar Jovanovic authored Jul 17, 2018
  f10e4798