Commits · 3971d3dc75f80b972863c5a336ca28ffce5c24eb · Roger Ferrer / llvm-epi · GitLab

Apr 09, 2014
- [ARM64] Rename LR to the UAL-compliant 'X30'. · 3971d3dc
  Bradley Smith authored Apr 09, 2014
  3971d3dc
- [ARM64] Rename FP to the UAL-compliant 'X29'. · 6f1aa59c
  Bradley Smith authored Apr 09, 2014
  6f1aa59c
- [ARM64] Add a PostEncoderMethod to FCMP - the Rm field should canonically be... · 5511f080
  Bradley Smith authored Apr 09, 2014
  5511f080
- [ARM64] SCVTF and FCVTZS/U are undefined if scale<5> == 0. · eb4ca04d
  Bradley Smith authored Apr 09, 2014
  eb4ca04d
- [ARM64] EXT and EXTR instructions on v8i8 and W regs respectively must have... · db7b9b17
  Bradley Smith authored Apr 09, 2014
  db7b9b17
- [ARM64] Scaled fixed-point FCVTZSs should also have bit 29 set to zero. · 60e76678
  Bradley Smith authored Apr 09, 2014
  60e76678
- [ARM64] UBFM/BFM is undefined on w registers when imms<5> or immr<5> is 1. · 7525b472
  Bradley Smith authored Apr 09, 2014
  7525b472
- [ARM64] Floating point to fixed point scaled conversions are only available on fcvtzs and fcvtzu. · 0243aa33
  Bradley Smith authored Apr 09, 2014
  0243aa33
- [ARM64] Port over the PostEncoderMethod fix for SMULH/UMULH from AArch64. · 8f906a3c
  Bradley Smith authored Apr 09, 2014
  8f906a3c
- [ARM64] Add missing tlbi operands and error for extra/missing register on tlbi aliases. · 9f29b726
  Bradley Smith authored Apr 09, 2014
  9f29b726
- [ARM64] Rework system register parsing to overcome SPSel clash in MSR variants. · e8b4166a
  Bradley Smith authored Apr 09, 2014
  e8b4166a
- [ARM64] Port over the PostEncoderMethod from AArch64 for exclusive loads and... · bc35b1f1
  Bradley Smith authored Apr 09, 2014
  bc35b1f1
- [ARM64] Use PStateMapper to ensure that MSRcpsr operands are validated during disassembly. · 4925be9b
  Bradley Smith authored Apr 09, 2014
  4925be9b
- [ARM64] Remove PrefetchOp and use ARM64PRFM instead. · 3339427e
  Bradley Smith authored Apr 09, 2014
  3339427e
- [ARM64] Add WZR to isGPR32Register, since every use needs to check for this anyway. · 16478c4c
  Bradley Smith authored Apr 09, 2014
  16478c4c
- [ARM64] Remove ARM64SYS. · 3db2a858
  Bradley Smith authored Apr 09, 2014
  3db2a858
- [ARM64] Move CPSRField and DBarrier operands over to AArch64-style disassembly... · fb90df56
  Bradley Smith authored Apr 09, 2014
  fb90df56
- [ARM64] Switch the decoder, disassembler, instprinter and asmparser over to... · 08c391c1
  Bradley Smith authored Apr 09, 2014
  08c391c1
- [ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64.... · 2ba17a4a
  Bradley Smith authored Apr 09, 2014
  2ba17a4a
- [ARM64] Copy the named immediate operand mapping logic and enums from AArch64.... · ceeb04df
  Bradley Smith authored Apr 09, 2014
  ceeb04df
- [ARM64] Shifted register ALU ops are reserved if sf=0 and imm6<5>=1, and also... · 8c0b88c9
  Bradley Smith authored Apr 09, 2014
  8c0b88c9
- [ARM64] Add support for NV condition code (exists only for valid... · 527bf86e
  Bradley Smith authored Apr 09, 2014
  527bf86e
- [ARM64] Add missing 1Q -> 1q vector kind alias · 6d7af17a
  Bradley Smith authored Apr 09, 2014
  6d7af17a
- [ARM64] Add parsing for vector lists such as {v0.8b-v3.8b} · 7d253f29
  Bradley Smith authored Apr 09, 2014
  7d253f29
- [ARM64] Correctly alias LSL to UXTW for 32bit instruction variants, rather than UXTX · 664aa671
  Bradley Smith authored Apr 09, 2014
  664aa671
- [ARM64] STRHro and STRBro were not being decoded at all. · 35cadc58
  Bradley Smith authored Apr 09, 2014
  35cadc58
- [ARM64] MOVK with sf=0 and hw<1>=1 is unallocated. Shift amount for ADD/SUB... · 87c60e00
  Bradley Smith authored Apr 09, 2014
  87c60e00
- [ARM64] Register-offset loads and stores with the 'option' field equal to 00x or 10x are undefined. · cd91e5cd
  Bradley Smith authored Apr 09, 2014
  cd91e5cd
- Revert "YAMLIO: Encode ambiguous hex strings explicitly" · 2c4e8ae0
  Filipe Cabecinhas authored Apr 09, 2014
  2c4e8ae0
- SLPVectorizer: Only vectorize intrinsics whose operands are widened equally · fd0bf5d6
  Arnold Schwaighofer authored Apr 09, 2014
  fd0bf5d6
- Extend the check to detect patterns like 'ptr.get() == nullptr' · 110f3cc4
  Samuel Benzaquen authored Apr 09, 2014
  110f3cc4
- clang-format: Update flag documentation, and generation script. · b5524827
  Daniel Jasper authored Apr 09, 2014
  b5524827
- Declare _DYNAMIC and dl_phdr_info in asan_linux.cc on FreeBSD · 82185a20
  Viktor Kutuzov authored Apr 09, 2014
  82185a20
- clang-format: Treat a trailing comment like a trailing comma in braced lists. · f9fc215f
  Daniel Jasper authored Apr 09, 2014
  f9fc215f
- AVX-512: insert element to mask vector; store i1 data · cf0b9baf
  Elena Demikhovsky authored Apr 09, 2014
  cf0b9baf
- clang-format: Fix bug where clang-format would break the code. · 21397a32
  Daniel Jasper authored Apr 09, 2014
  21397a32
- clang-format: Improve format of calls with several lambdas. · 3ae6f5a4
  Daniel Jasper authored Apr 09, 2014
  3ae6f5a4
- Add support for building LLVM on FreeBSD 9.2 · 6bd32296
  Viktor Kutuzov authored Apr 09, 2014
  6bd32296
- clang-format: Allow breaking between trailing annotations in more cases. · f9a0906b
  Daniel Jasper authored Apr 09, 2014
  f9a0906b
- clang-format: Keep more trailing annotations on the same line. · b48d3afc
  Daniel Jasper authored Apr 09, 2014
  b48d3afc