Summary:
The following changes addresses the following two issues.

1) The existing loop rotation pass contains both loop latch simplification and loop rotation. So one flag RotationOnly is added to be passed to the loop rotation pass.
2) The threshold value is initialized with MAX_UINT since the loop rotation utility should not have threshold limit.

Reviewers: dmgreen, efriedma

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D45582

llvm-svn: 330362

In an upcoming change I will need to make a distinction between section
type (code, data, bss) and permissions. The term that I use for both
of these things is "output characteristics".

Differential Revision: https://reviews.llvm.org/D45799

llvm-svn: 330361

Summary:
It is immediately preceded by this check:
  #if _MSC_VER < 1900
  #error "MSVC versions prior to Visual Studio 2015 are not supported"
  #endif

Reviewers: EricWF

Subscribers: christof, cfe-commits

Differential Revision: https://reviews.llvm.org/D45829

llvm-svn: 330360

Thanks to Alexander Ivchenko for finding the issue!

llvm-svn: 330359

Silvermont and Goldmont have the same issue on popcnt as Sandy Bridge, Haswell, Broadwell, and Skylake. Believe it is fixed in Goldmont Plus.

llvm-svn: 330358

[PM/LoopUnswitch] Detect irreducible control flow within loops and skip unswitching non-trivial edges.

Summary:
This fixes the bug pointed out in review with non-trivial unswitching.

This also provides a basis that should make it pretty easy to finish
fleshing out a routine to scan an entire function body for irreducible
control flow, but this patch remains minimal for disabling loop
unswitch.

Reviewers: sanjoy, fedor.sergeev

Subscribers: mcrosier, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D45754

llvm-svn: 330357

This forces these operations to be carried out via a
MaterializationResponsibility instance, ensuring responsibility is explicitly
tracked.

llvm-svn: 330356

Summary:
Some of the functions had spurious conditional statements and checks, and some
intermediary variables that I feel made the code more complicated than it needs
to be. Also, when unmapping the whole range, the range size would be 0, but
the base was set to the address of the end of the range, which sounds prone to
error. I think nulling out the base in this scenario is a better way to go.

Reviewers: alekseyshl, flowerhack

Reviewed By: alekseyshl

Subscribers: kubamracek, delcypher, #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D45775

llvm-svn: 330355

llvm-svn: 330354

RecursiveASTVisitorTest.cpp is one of the longest compile jobs and a
build bottleneck on many-core machines. This patch breaks that file and
some peer files up into smaller files to increase build concurrency and
overall rebuild performance.

llvm-svn: 330353

I've copied and regenerated a resource file from btver2 to every x86 scheduler model supported by llvm-mca so we have at least some basic coverage.

For most this has been the avx1 tests, but for silvermont I've used sse42 as thats the latest it supports.

More will be added later.

llvm-svn: 330352

Luckily this was on instructions not supported on Silvermont....

llvm-svn: 330351

This is much simpler than the other section types and there are many
places where the section type is statically know.

llvm-svn: 330350

The XCHG16rr/XCHG32rr/XCHG64rr instructions should be 3 uops just like XCHG8rr. I believe they're just implemented as 3 move uops with a temporary register.

XADD is probably 2 moves and an add also using a temporary register.

Change the latency for both from 2 cycles to 3 cycles. Only 2 of the uops are serialized in their execution, the move into the temporary and the move out of the temporary. The move from one GPR to the other should be able to go in parallel with this if there are ALU resources available.

llvm-svn: 330349

llvm-svn: 330348

There's a lot more but I'd prefer focussing on removing unnecessary InstRWs first.

llvm-svn: 330347

Now that we don't ICF synthetic sections, we can go back to the old
logic on whose responsibility it is to check Repl.

The idea is that Sec->something() will not check Repl. It is the
responsibility of the caller to find the correct Sec.

llvm-svn: 330346

This fixes https://llvm.org/PR36825.

Original patch by Valentin Churavy (D45218).

Differential Revision: https://reviews.llvm.org/D45731

llvm-svn: 330345

llvm-svn: 330344

Forgot to remove it from the previous commit.

llvm-svn: 330343

When disassembling with -D, skip virtual sections by printing "..." for
each symbol.

This patch also implements `MachOObjectFile::isSectionVirtual`.

Test case comes from:

```
.zerofill __DATA,__common,_data64unsigned,472,3
```

Differential Revision: https://reviews.llvm.org/D45824

llvm-svn: 330342

Summary:
Instead of manually invoking PrintStatistics, simply invoke
llvm_shutdown which will take care of destroying managed statics, and as
a side effect will destroy the StatisticInfo ManagedStatic, invoking
PrintStatistics when needed.

Reviewers: fhahn

Subscribers: inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D45820

llvm-svn: 330341

We had a single symbol using -1 with a synthetic section. It is
simpler to just update its value.

This is not a big will by itself, but will allow having a simple
getOffset for InputSeciton.

llvm-svn: 330340

Unlike the getOffset in the base class, this one computes the offset
in the parent synthetic section, not the final output section.

llvm-svn: 330339

Summary:
Under some conditions, LinkageComputer can get the visibility for
ClassTemplateSpecializationDecl wrong because it failed to find the Decl
that has the explicit visibility.

This fixes:
llvm.org/bugs/pr36810
rdar://problem/38080953

Reviewers: rsmith, arphaman, doug.gregor

Reviewed By: doug.gregor

Subscribers: doug.gregor, cfe-commits

Differential Revision: https://reviews.llvm.org/D44670

llvm-svn: 330338

We should also check that the "bottom" basic block of a loopis a successor of the "header" basic block, otherwise we don't propagate the information correctly when the CFG is complex. This fixes an important rendering problem with Wolfsentein 2, because of one vector-memory wait was missing.

Differential Revision: https://reviews.llvm.org/D43831

llvm-svn: 330337

Differential Revision: https://reviews.llvm.org/D45670

llvm-svn: 330336

Useful to see scheduler class deltas against xmm equivalents

llvm-svn: 330335

If those operands change, we might find a leader for ValueOp, which
could enable new phi-of-op creation.

This fixes a case where we missed creating a phi-of-ops node. With D43865
and this patch, bootstrapping clang/llvm works with -enable-newgvn, whereas
without it, the "value changed after iteration" assertion is triggered.

Reviewers: dberlin, davide

Reviewed By: dberlin

Differential Revision: https://reviews.llvm.org/D42180

llvm-svn: 330334

llvm-svn: 330333

These are already handled identically by WriteALU.

llvm-svn: 330332

The force_align_arg_pointer attribute was using a hardcoded 16-byte
alignment value which in combination with -mstack-alignment=32 (or
larger) would produce a misaligned stack which could result in crashes
when accessing stack buffers using aligned AVX load/store instructions.

Fix the issue by using the "stackrealign" function attribute instead
of using a hardcoded 16-byte alignment.

Patch By: Gramner

Differential Revision: https://reviews.llvm.org/D45812

llvm-svn: 330331

llvm-svn: 330330

Summary:
Currently the PluginsTests.LoadPlugin unit test is failing in
LLVM configurations that have LLVM_EXPORT_SYMBOLS_FOR_PLUGINS enabled
because the EnableABIBreakingChecks symbol is missing.

This patch fixes the issue by linking some additional libraries to the
test plugin if LLVM_EXPORT_SYMBOLS_FOR_PLUGINS is enabled.

Reviewers: philip.pfaffe

Reviewed By: philip.pfaffe

Subscribers: mgorny, llvm-commits, rogfer01

Differential Revision: https://reviews.llvm.org/D45811

llvm-svn: 330329

The initial naive approach to simulate SIGINT on Fuchsia was to getchar
and look for ETX. This caused the InterruptHandler thread to lock stdin,
preventing musl's exit() from being able to close the stdio descriptors
and complete. This change uses select() instead.

Patch By: aarongreen

Differential Revision: https://reviews.llvm.org/D45636

llvm-svn: 330328

llvm-svn: 330327

These instructions lacked the correct predicates, were not marked
as loads and stores and lacked the proper instruction mapping information.

In the case of microMIPS sw(l|r)e (EVA) these instructions were using the load
EVA description.

Reviewers: abeserminji, smaksimovic, atanasyan

Differential Revision: https://reviews.llvm.org/D45626

llvm-svn: 330326

llvm-svn: 330325

Summary: This implements an alternative to r327861, namely preserving empty lines before namespace endings.

Reviewers: djasper

Reviewed By: djasper

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D45373

llvm-svn: 330324

This is the patch that lowers x86 intrinsics to native IR
in order to enable optimizations.

Patch by tkrupa

Differential Revision: https://reviews.llvm.org/D44786

llvm-svn: 330323