Implement the isTruncateFree hooks, lifted from AArch64, that are
used by TargetTransformInfo. This allows simplifycfg to reduce the
test case into a single basic block.

Differential Revision: https://reviews.llvm.org/D37516

llvm-svn: 313533

As discussed on PR28925 and D37849.

Differential Revision: https://reviews.llvm.org/D37975

llvm-svn: 313532

The indexed dot product instructions only accept the lower 16 D-registers as
the indexed register, but we were e.g. incorrectly accepting:

vudot.u8 d16,d16,d18[0]

Differential Revision: https://reviews.llvm.org/D37968

llvm-svn: 313531

This patch makes the `.eh_frame` extension an alias for `.debug_frame`.
Up till now it was only possible to dump the section using objdump, but
not with dwarfdump. Since the two are essentially interchangeable, we
dump whichever of the two is present.

As a workaround, this patch also adds parsing for 3 currently
unimplemented CFA instructions: `DW_CFA_def_cfa_expression`,
`DW_CFA_expression`, and `DW_CFA_val_expression`. Because I lack the
required knowledge, I just parse the fields without actually creating
the instructions.

Finally, this also fixes the typo in the `.debug_frame` section name
which incorrectly contained a trailing `s`.

Differential revision: https://reviews.llvm.org/D37852

llvm-svn: 313530

llvm-svn: 313529

We were reusing the 'false' select value 'is zero' variable name for the 'true' select value 'is zero' variable name.

llvm-svn: 313528

Summary:
Subregister liveness tracking is not implemented for X86 backend, so
sometimes the whole super register is said to be live, when only a
subregister is really live. That might happen if the def and the use
are located in different MBBs, see added fixup-bw-isnt.mir test.

However, using knowledge of the specific instructions handled by the
bw-fixup-pass we can get more precise liveness information which this
change does.

Reviewers: MatzeB, DavidKreitzer, ab, andrew.w.kaylor, craig.topper

Reviewed By: craig.topper

Subscribers: n.bozhenov, myatsina, llvm-commits, hiraditya

Patch by Andrei Elovikov <andrei.elovikov@intel.com>

Differential Revision: https://reviews.llvm.org/D37559

llvm-svn: 313524

related to patch: https://reviews.llvm.org/D35772
adding llvm gathers test before gathers codegen support.

Differential Revision: https://reviews.llvm.org/D37800

llvm-svn: 313516

Summary:
This change adds support for explicit tail-exit records to be written by
the XRay runtime. This lets us differentiate the tail exit
records/events in the log, and allows us to treat those exit events
especially in the future. For now we allow printing those out in YAML
(and reading them in).

Reviewers: kpw, pelikan

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D37964

llvm-svn: 313514

This effects the vector shift and rotates as well as some of the vector compares.

The changes to the shifts by immediates allows a few hundred bytes to be removed by removing type checks for the size of the immediate containing the shift/rotate amount.

llvm-svn: 313512

[X86] Teach the execution domain fixing tables to use movlhps inplace of unpcklpd for the packed single domain.

MOVLHPS has a smaller encoding than UNPCKLPD in the legacy encodings. With VEX and EVEX encodings it doesn't matter.

llvm-svn: 313509

llvm-svn: 313508

llvm-svn: 313507

It was used in patterns, but we had the exact same patterns with Unpckl as well. So now just use Unpckl in the instruction patterns.

llvm-svn: 313506

[X86] Teach shuffle lowering to use MOVLHPS/MOVHLPS for lowering v4f32 unary shuffles with SSE1 only.

llvm-svn: 313504

These can be implemented with movlhps and movhlps.

llvm-svn: 313503

For some reason the SSE1 pattern expected a X86Movlhps pattern to have a v4f32 type, but AVX and AVX512 expected it to have a v4i32 type.

I'm not even sure this pattern is even reachable post SSE1, but I'm starting with fixing this obvious bug.

llvm-svn: 313495

The memory patterns were near the MOVDDUP definition, but the non-memory patterns were near the broadcast instructions.

llvm-svn: 313494

llvm-svn: 313493

[X86] Remove isel patterns for X86Movhlps and X86Movlhps with integer types. Lowering doesn't emit these.

llvm-svn: 313492

llvm-svn: 313491

Differential Revision: https://reviews.llvm.org/D37962

llvm-svn: 313490

This reverts commit r313488, because it breaks compilation on Android and breaks llvm-lto. 

llvm-svn: 313489

Summary:
ld64 on OSX uses the old ThinLTOCodegenerator API. When two modules have the same name in an archive (valid archive), a name collision happens for the modules' buffer identifiers.
This PR resolves this, by suffixing the module name with an increasing number such that the identifiers are guaranteed to be unique.

For a similar fix in LLD, see https://reviews.llvm.org/D25495

Reviewers: mehdi_amini, tejohnson

Reviewed By: mehdi_amini

Subscribers: inglorion, eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D37961

llvm-svn: 313488

This Disassembly support allows for 'round-trip' testing, and rv32i-valid.s
has been updated appropriately.

Differential Revision: https://reviews.llvm.org/D23567

llvm-svn: 313486

This patch supports all RV32I instructions as described in the RISC-V manual.
A future patch will add support for pseudoinstructions and other instruction
expansions (e.g. 0-arg fence -> fence iorw, iorw).

Differential Revision: https://reviews.llvm.org/D23566

llvm-svn: 313485

llvm-svn: 313484

llvm-svn: 313483

Lambdas are slightly more verbose, but also more readable. No
functionality change intended.

llvm-svn: 313482

It's removed in C++17. No functionality change intended.

llvm-svn: 313481

llvm-svn: 313479

Summary: G_FCONSTANT support, port the implementation from X86FastIsel.

Reviewers: zvi, delena, guyblank

Reviewed By: delena

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D37734

llvm-svn: 313478

llvm-svn: 313477

llvm-svn: 313476

llvm-svn: 313475

This can be used to add a relocatable object to the JIT session.

llvm-svn: 313474

Summary: Fix a few typos and update names to match current source.

Differential Revision: https://reviews.llvm.org/D37948

llvm-svn: 313473

This adds new patterns and SDNodeXForm to enable the immediate to commuted.

llvm-svn: 313472

Previously we were just relying on pattern order to define precedence. Which works, but isn't the best way.

llvm-svn: 313471

It doesn't make sense to me why these bots are failing as the
traceback does not agree with the source code.  It's possible
something is stale or there is some other mysterious error,
but in any case hopefully this fixes it.

llvm-svn: 313469