[clang-tidy] Fix an assertion failure of "SLocEntry::getExpansion()" when IncludeInserter handles macro header file.

Summary: Also Fixes PR24749.

Reviewers: alexfh

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D17805

llvm-svn: 262484

Incremented the pc for each architecture in accordance with StackTrace:GetPreviousInstructionPC

Reviewers: samsonov, dvyukov
Subscribers: llvm-commits, mohit.bhakkad, jaydeep
Differential: http://reviews.llvm.org/D17802
llvm-svn: 262483

Previously we were using thumbv7 and armv8.1a what ended up showing a
few undefined instruction when disassembling code. This CL update the
architectures used to armv8.2a and thumbv8.2a (newest available) so we
display all instruction in the disassambly.

llvm-svn: 262482

Differential Revision: http://reviews.llvm.org/D17706

llvm-svn: 262481

Differential Revision: http://reviews.llvm.org/D17705

llvm-svn: 262480

This reverts commit r262476, as it broken the AArch64 VMA42 buildbot.

llvm-svn: 262479

We have a number of useful lowering strategies for VBROADCAST instructions (both from memory and register element 0) which the 128-bit form of the MOVDDUP instruction can make use of.

This patch tweaks lowerVectorShuffleAsBroadcast to enable it to broadcast 2f64 args using MOVDDUP as well.

It does require a slight tweak to the lowerVectorShuffleAsBroadcast mechanism as the existing MOVDDUP lowering uses isShuffleEquivalent which can match binary shuffles that can lower to (unary) broadcasts.

Differential Revision: http://reviews.llvm.org/D17680

llvm-svn: 262478

Build failure with clang.

llvm-svn: 262477

by avoiding potential races when scanning stdout and stderr output.

Patch by Maxim Kuvyrkov.

llvm-svn: 262476

Build failure with clang.

llvm-svn: 262475

complementary patch to table-driven amd_kernel_code_t field parser/printer utility. lit tests passed.

Patch by: Valery Pykhtin

Differential Revision: http://reviews.llvm.org/D17151

llvm-svn: 262474

This is going to be used in .hsatext disassembler and can be used
in current assembler parser (lit tests passed on parsing).
Code using this helpers isn't included in this patch.

Benefits:

unified approach
fast field name lookup on parsing
Later I would like to enhance some of the field naming/syntax using this code.

Patch by: Valery Pykhtin

Differential Revision: http://reviews.llvm.org/D17150

llvm-svn: 262473

- unused sigaction/setitimer result (used in assert)
- unchecked fscanf return value
- signed/unsigned comparison

llvm-svn: 262472

Differential Revision: http://reviews.llvm.org/D17699

llvm-svn: 262471

Reviewers: alexfh

Subscribers: jbcoe, cfe-commits

Differential Revision: http://reviews.llvm.org/D17756

llvm-svn: 262470

Reviewers: samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17783

llvm-svn: 262469

[X86] Remove unnecessary call to isReg from emitter's DestMem handling for VEX prefix. The operand is always a register. NFC

llvm-svn: 262468

[X86] Make X86MCCodeEmitter::DetermineREXPrefix locate operands more like how VEX prefix handling does.

llvm-svn: 262467

Sema allows max values up to 2**28, use unsigned instead of unsiged
short to hold values that large.

Differential Revision: http://reviews.llvm.org/D17248

Patch by Don Hinton!

llvm-svn: 262466

We modeled the RDFLAGS{32,64} operations as "using" {E,R}FLAGS.
While technically correct, this is not be desirable for folks who want
to examine aspects of the FLAGS register which are not related to
computation like whether or not CPUID is a valid instruction.

Differential Revision: http://reviews.llvm.org/D17782

llvm-svn: 262465

llvm-svn: 262464

Differential Revision:	  http://reviews.llvm.org/D17794

llvm-svn: 262463

[X86] Be more structured about how we capture the register number when it is encoded in bits 7:4 of the immediate.

For some instructions the register is not the last operand and the immediate handling had to detect this and hardcode the index to find it. It also required CurOp to be pointing at the last operand handled in the Form switch whereas for any instruction it would be pointing at the next operand.

Now we just capture the value in the Form switch when we know exactly where it is and the CurOp pointer can behave normally.

llvm-svn: 262462

The patch fixes two related problems:
- If CIE augmentation string has 'L' token the CIE contains a byte
  defines LSDA encoding. We should skip this byte in `getFdeEncoding`
  routine. Before this fix we do not skip it and if the next token
  is 'R' treat this byte as FDE encoding.
- FDE encoding format has separate flags e.g. DW_EH_PE_pcrel for
  definition of relative pointers. We should add .eh_frame address to
  the PC value iif the DW_EH_PE_pcrel is specified.

http://www.airs.com/blog/archives/460

There is one more not fixed problem in this code. If PC value is encoded
using signed relative format e.g. DW_EH_PE_sdata4 | DW_EH_PE_pcrel we
should sign extend result of read32 to perform calculation correctly.
I am going to fix that in a separate patch.

Differential Revision: http://reviews.llvm.org/D17733

llvm-svn: 262461

OpenMP 4.5 allows to privatize non-static data members of current class
in non-static member functions. Patch supports codegen for non-static
data members in 'reduction' clauses.

llvm-svn: 262460

llvm-svn: 262459

[X86] Use MCPhysReg and uint16_t for static arrays of registers and opcodes respectively should reduce size tiny bit. NFC

llvm-svn: 262458

Fix checking the same instruction twice instead of the
second branch that uses vccz. I don't think this matters
currently because s_branch_vccnz is always used currently.

llvm-svn: 262457

llvm-svn: 262456

llvm-svn: 262455

llvm-svn: 262454

llvm-svn: 262453

llvm-svn: 262452

For some reason MSVC seems to think I'm calling getConstant() from a
static context.  Try to avoid this issue by explicitly specifying
'this->' (though I'm not confident that this will actually work).

llvm-svn: 262451

llvm-svn: 262450

llvm-svn: 262449

llvm-svn: 262448

llvm-svn: 262447

llvm-svn: 262446

llvm-svn: 262445