Commits · 9e7febb4f73c8584f622d4dad17be5417938eb10 · Roger Ferrer / llvm-epi · GitLab

Nov 10, 2022
- [AArch64]SME2 Multi vector Sel Load and Store instructions · ecab1bc0
  Caroline Concatto authored Nov 02, 2022
  ecab1bc0
Nov 03, 2022
- [AArch64]SME2 instructions that use ZTO operand · a20112a7
  Caroline Concatto authored Oct 28, 2022
  a20112a7
Nov 02, 2022
- [AArch64][SVE2] Add the SVE2.1 while & pext predicate pair instructions · be369ea3
  David Sherwood authored Oct 26, 2022
  be369ea3
Oct 29, 2022
- [llvm-tblgen] NFC: Simplify DecoderEmitter. · 9a26f893
  James Y Knight authored Oct 28, 2022
  9a26f893
Oct 27, 2022
- [AArch64][SVE2] Add the SVE2.1 pext and ptrue predicate-as-counter instructions · 891aaff9
  David Sherwood authored Oct 25, 2022
  891aaff9
Oct 20, 2022
- [AArch64]SME2 Multiple vector ternary int/float 2 and 4 registers · 9db12a45
  Caroline Concatto authored Oct 17, 2022
  9db12a45
Oct 19, 2022
- [AArch64] SME2 Single-multi vector ternary int/FP 2 and 4 registers · 2ecbe8c3
  Caroline Concatto authored Oct 03, 2022
  2ecbe8c3
Aug 13, 2022
- [llvm] Qualify auto in range-based for loops (NFC) · 109df7f9
  Kazu Hirata authored Aug 13, 2022
  109df7f9
Aug 08, 2022
- [llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC · de9d80c1
  Fangrui Song authored Aug 08, 2022
  de9d80c1
Jul 26, 2022
- [MC,llvm-objdump,ARM] Target-dependent disassembly resync policy. · 55f1fbf0
  Simon Tatham authored Jul 26, 2022
  55f1fbf0
May 25, 2022
- [MCDisassembler] Disambiguate Size parameter in tryAddingSymbolicOperand() · bed9efed
  Maksim Panchenko authored May 19, 2022
  bed9efed
May 20, 2022
- [AArch64][SME][NFC] Add implicit operands for SME instructions in the disassembly. · 8765ad42
  Caroline Concatto authored May 13, 2022
  8765ad42
May 15, 2022
- Rename `MCFixedLenDisassembler.h` as `MCDecoderOps.h` · c644488a
  Sheng authored May 15, 2022
  c644488a
Mar 26, 2022
- [Disassember][NFCI] Use strong type for instruction decoder · 4ae9745a
  Maksim Panchenko authored Mar 21, 2022
  4ae9745a
Jan 07, 2022
- Ensure newlines at the end of files (NFC) · 410480e3
  Kazu Hirata authored Jan 06, 2022
  
  410480e3
Jan 05, 2022
- [AArch64] Adding "armv8.8-a" memcpy/memset support. · e35a3f18
  Simon Tatham authored Feb 11, 2021
  e35a3f18
Nov 10, 2021
- [aarch64/mac] Correctly disassemble @TLVPPAGE(OFF) relocs · e23c6cc5
  Nico Weber authored Oct 29, 2021
  e23c6cc5
Oct 08, 2021
- Move TargetRegistry.(h|cpp) from Support to MC · 89b57061
  Reid Kleckner authored Oct 08, 2021
  89b57061
Oct 07, 2021
- [AArch64][SME] Update tile slice index offset · 42ba79b7
  Cullen Rhodes authored Oct 07, 2021
  42ba79b7
Sep 03, 2021
- [AArch64][SME] Support NEON vector to GPR integer moves in streaming mode · dc5dd77a
  Cullen Rhodes authored Aug 11, 2021
  dc5dd77a
Aug 12, 2021
- [AArch64] NFC: Remove register decoder tables in disassembler · 419deccf
  Cullen Rhodes authored Aug 12, 2021
  419deccf
Aug 09, 2021
- [AArch64] NFC: Remove DecodeVectorRegisterClass from disassembler · 1a18bb92
  Cullen Rhodes authored Aug 09, 2021
  1a18bb92
Aug 06, 2021
- [AArch64] NFC: drop unnecessary llvm:: namespace prefix on MCInst · 08bc4411
  Cullen Rhodes authored Aug 06, 2021
  
  08bc4411
Jul 27, 2021
- [AArch64][SME] Add zero instruction · 2e27c4e1
  Cullen Rhodes authored Jul 27, 2021
  2e27c4e1
Jul 21, 2021
- [AArch64][SME] Add mova instructions · 2d80bbd9
  Cullen Rhodes authored Jul 21, 2021
  2d80bbd9
- [AArch64][SME] Add ldr and str instructions · 6c32cfe8
  Cullen Rhodes authored Jul 21, 2021
  6c32cfe8
Jul 20, 2021
- [AArch64][SME] Add system registers and related instructions · 15af3aaa
  Cullen Rhodes authored Jul 20, 2021
  15af3aaa
Jul 16, 2021
- [AArch64][SME] Add load and store instructions · 99eb96f0
  Cullen Rhodes authored Jul 16, 2021
  99eb96f0
Jul 14, 2021
- [AArch64][SME] Add matrix register definitions and parsing support · c08dabb0
  Cullen Rhodes authored Jul 14, 2021
  c08dabb0
Dec 17, 2020
- [AArch64] Adding the v8.7-A LD64B/ST64B Accelerator extension · 31388919
  Lucas Prates authored Nov 16, 2020
  31388919
- [AArch64] Add a GPR64x8 register class · 97c006aa
  Lucas Prates authored Nov 12, 2020
  97c006aa
- [NFC][AArch64] Move AArch64 MSR/MRS into a new decoder namespace · b5bbb4b2
  Lucas Prates authored Nov 11, 2020
  b5bbb4b2
Nov 13, 2020
- llvmbuildectomy - replace llvm-build by plain cmake · 9218ff50
  serge-sans-paille authored Oct 09, 2020
  9218ff50
Jun 25, 2020
- [AArch64] Emit warning when disassembling unpredictable LDRAA and LDRAB · da852b03
  Victor Campos authored Jun 24, 2020
  da852b03
Jan 15, 2020
- CMake: Make most target symbols hidden by default · 0dbcb363
  Tom Stellard authored Jan 14, 2020
  0dbcb363
Jan 11, 2020
- [Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction() · 6fdd6a7b
  Fangrui Song authored Jan 11, 2020
  6fdd6a7b
Nov 21, 2019
- [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" · ab411801
  Tom Stellard authored Nov 14, 2019
  ab411801
Jun 11, 2019
- Revert CMake: Make most target symbols hidden by default · 4b0b2619
  Tom Stellard authored Jun 11, 2019
  4b0b2619
- CMake: Make most target symbols hidden by default · 37457130
  Tom Stellard authored Jun 10, 2019
  37457130
May 14, 2019
- [AArch64] Create a TargetInfo header. NFC · b26592e0
  Richard Trieu authored May 14, 2019
  b26592e0