Commits · b10c92001ccaaeda5154d5c20c23fdaf18f8d9c3 · Roger Ferrer / llvm-epi · GitLab

Sep 24, 2014
- Follow-up to r218292: Add more REVERTIBLE_TYPE_TRAITs. · b10c9200
  Nico Weber authored Sep 24, 2014
  b10c9200
- Clear PreferredExtendType for in each function-specific state FunctionLoweringInfo. · 3b096172
  Jiangning Liu authored Sep 24, 2014
  3b096172
- [x86] More refactoring of the shuffle comment emission. The previous · 7b688c68
  Chandler Carruth authored Sep 24, 2014
  7b688c68
- [x86] Bypass the shuffle mask comment generation when not using verbose · edf50212
  Chandler Carruth authored Sep 24, 2014
  edf50212
- [x86] Hoist the logic for extracting the relevant bits of information · ab8b37a9
  Chandler Carruth authored Sep 24, 2014
  ab8b37a9
- R600/SI: Add new helper isSGPRClassID · 2c419874
  Matt Arsenault authored Sep 24, 2014
  2c419874
- R600/SI: Fix hardcoded and wrong operand numbers. · 262407bc
  Matt Arsenault authored Sep 24, 2014
  262407bc
- R600/SI: Enable named operand table for SALU instructions · 69612d60
  Matt Arsenault authored Sep 24, 2014
  69612d60
- [x86] Start refactoring the comment printing logic in the MC lowering of · 0b682d42
  Chandler Carruth authored Sep 24, 2014
  0b682d42
- R600/SI: Fix weird CHECK-DAG usage · 3e0effa2
  Matt Arsenault authored Sep 24, 2014
  3e0effa2
- [PECOFF] Exported name should match C++ mangled name · a370c3ee
  Rui Ueyama authored Sep 24, 2014
  a370c3ee
- [PECOFF] Keep renamed undefined symbol name in export descriptor · 359a47ce
  Rui Ueyama authored Sep 24, 2014
  359a47ce
- R600/SI: Enable selecting SALU inside branches · 744b99b4
  Tom Stellard authored Sep 24, 2014
  744b99b4
- R600/SI: Move PHIs that define SGPRs to the VALU in most cases · deb3f9e6
  Tom Stellard authored Sep 24, 2014
  deb3f9e6
- R600/SI: Fix the FixSGPRLiveRanges pass · 60024a05
  Tom Stellard authored Sep 24, 2014
  60024a05
- R600/SI: Mark EXEC_LO and EXEC_HI as reserved · be507fb5
  Tom Stellard authored Sep 24, 2014
  be507fb5
- R600/SI: Fix SIRegisterInfo::getPhysRegSubReg() · 9a88593e
  Tom Stellard authored Sep 24, 2014
  9a88593e
- R600/SI: Implement VGPR register spilling for compute at -O0 v3 · 96468903
  Tom Stellard authored Sep 24, 2014
  96468903
- [x86] Teach the new vector shuffle lowering to lower v8i32 shuffles with · 9bd10e74
  Chandler Carruth authored Sep 24, 2014
  9bd10e74
- [x86] Fix a really terrible bug in the repeated 128-bin-lane shuffle · fd11815a
  Chandler Carruth authored Sep 24, 2014
  fd11815a
- [PECOFF] Keep unmangled name in the export table descriptor · de18f965
  Rui Ueyama authored Sep 24, 2014
  de18f965
- [PECOFF] Simplify /machine option handling · 251d9a34
  Rui Ueyama authored Sep 24, 2014
  251d9a34
- [PECOFF] Change export table type. · 75c0127b
  Rui Ueyama authored Sep 24, 2014
  75c0127b
- [PECOFF] Fix duplicate /export options · 7ea46bab
  Rui Ueyama authored Sep 23, 2014
  7ea46bab
- Fix swift-atomics testcase · dc1b248c
  Robin Morisset authored Sep 23, 2014
  dc1b248c
- MS ABI: Pure virtual functions don't contribute to vtordisps · c2e67539
  David Majnemer authored Sep 23, 2014
  c2e67539
- Improve -Wuninitialized to take into account field ordering with initializer · e396ba6b
  Richard Trieu authored Sep 23, 2014
  e396ba6b
- [x86] Teach the new vector shuffle lowering to lower v4i64 vector · df2e4218
  Chandler Carruth authored Sep 23, 2014
  df2e4218
- GlobalOpt: Preserve comdats of unoptimized initializers · 78927e88
  Reid Kleckner authored Sep 23, 2014
  78927e88
- AArch64: allow constant expressions for shifted reg literals · 57fd2623
  Jim Grosbach authored Sep 23, 2014
  57fd2623
- [x86] Teach the rest of the 'target shuffle' machinery about blends and · 9a94bd6f
  Chandler Carruth authored Sep 23, 2014
  9a94bd6f
Sep 23, 2014
- R600/SI: Clean up checks for legality of immediate operands · 73ae1cb5
  Tom Stellard authored Sep 23, 2014
  73ae1cb5
- PR18793: If we try to EnterTokenStream when our current lexer is a caching · bdf54a21
  Richard Smith authored Sep 23, 2014
  bdf54a21
- [X86] Make wide loads be managed by AtomicExpand · 6dbbbc28
  Robin Morisset authored Sep 23, 2014
  6dbbbc28
- [Power] Use AtomicExpandPass for fence insertion, and use lwsync where appropriate · 22129969
  Robin Morisset authored Sep 23, 2014
  22129969
- Don't perform ADL when looking up operator=; there is no non-member form of · 0daabd7e
  Richard Smith authored Sep 23, 2014
  0daabd7e
- Add AtomicExpandPass::bracketInstWithFences, and use it whenever... · dedef332
  Robin Morisset authored Sep 23, 2014
  dedef332
- [MCJIT] Fix some more RuntimeDyld debugging output format specifiers. · da016026
  Lang Hames authored Sep 23, 2014
  da016026
- [MCJIT] Remove PPCRelocations.h - it's no longer used. · a633a6cd
  Lang Hames authored Sep 23, 2014
  a633a6cd
- Just add a fixme about a possibly faster implementation of some atomic loads on some ARM processors · a7b357fe
  Robin Morisset authored Sep 23, 2014
  a7b357fe