- Jun 12, 2018
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George Burgess IV authored
Not shown in the diff: AQ is a `vector<SUnit *>`, and SU is a `SUnit *` llvm-svn: 334451
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Wei Mi authored
llvm-svn: 334449
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Wei Mi authored
Name table occupies a big chunk of size in current binary format sample profile. In order to reduce its size, the patch changes the sample writer/reader to save/restore MD5Hash of names in the name table. Sample annotation phase will also use MD5Hash of name to query samples accordingly. Experiment shows compact binary format can reduce the size of sample profile by 2/3 compared with binary format generally. Differential Revision: https://reviews.llvm.org/D47955 llvm-svn: 334447
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David Blaikie authored
llvm-svn: 334446
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- Jun 11, 2018
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Konstantin Zhuravlyov authored
Differential Revision: https://reviews.llvm.org/D47601 llvm-svn: 334443
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Matt Arsenault authored
This would fail before because 1x vectors aren't legal, so instead just use the scalar type. Avoids regressions in a future AMDGPU commit to add v4i16/v4f16 as legal types. Test update is just the one test that this triggers on in tree now. It wasn't checking anything before. The result is completely changed since the selects are eliminated. Not sure if it's considered better or not. llvm-svn: 334440
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Craig Topper authored
All of the cases are already wrapped in curly braces so declaring a variable there isn't an issue. And the variables aren't assigned or used in the larger scope. llvm-svn: 334436
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Farhana Aleen authored
Author: FarhanaAleen llvm-svn: 334435
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Tim Shen authored
llvm-svn: 334434
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Craig Topper authored
[X86] Reorder some type constraints to force things to be vectors and integer/fp before forcing them to be the same size. This may be needed by another patch that I'm working on. It should have no effect on any of the generated outputs. llvm-svn: 334430
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Justin Lebar authored
Reviewers: sanjoy Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D48041 llvm-svn: 334429
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Justin Lebar authored
Summary: Previously we would add them for adds, but not multiplies. Reviewers: sanjoy Subscribers: llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D48038 llvm-svn: 334428
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Justin Lebar authored
Whitespace-only change. (clang-formatted the whole block.) llvm-svn: 334427
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Krzysztof Parzyszek authored
llvm-svn: 334426
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Tim Shen authored
Summary: FWIW InstCombine already folds this. Also avoid the case where C1*C2 overflows. Reviewers: sunfish, sanjoy Subscribers: hiraditya, bixia, llvm-commits Differential Revision: https://reviews.llvm.org/D47965 llvm-svn: 334425
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Simon Pilgrim authored
Necessary for D46276 as even though btver2 doesn't use these instructions, its now flagged as complete so complains if ANY instruction isn't tagged..... UnsupportedFeatures wouldn't help here as these instructions don't appear to have a feature predicate (like a lot of AVX512). llvm-svn: 334423
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Stanislav Mekhanoshin authored
Rational: if there is indirect access that is usually an issue because load is not ready by the use. However, if use is inside a loop and load is outside that is potentially an issue for a first iteration only. Differential Revision: https://reviews.llvm.org/D47740 llvm-svn: 334420
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Aleksandar Beserminji authored
When program is compiled for mips3 with n64 abi, wrong register class is used for creating an emergency spill slot. This patch fixes the correct register class to be chosen. This patch resolves PR35859. Thanks to John Baldwin for reporting the issue! Differential Revision: https://reviews.llvm.org/D47938 llvm-svn: 334419
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Dylan McKay authored
This sets trackLivenessAfterRegAlloc on AVRRegisterInfo. Most existing targets set this flag. Without it, specific IR inputs cause LLVM to fail with: Assertion failed: (getParent()->getProperties().hasProperty( MachineFunctionProperties::Property::TracksLiveness) && "Liveness information is accurate"), function livein_begin file MachineBasicBlock.cpp, line 1354. With this commit, this no longer happens. Patch by Peter Nimmervoll. llvm-svn: 334409
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Clement Courbet authored
Summary: This fixes most of the scheduling info for SKX vector operations. I had to split a lot of the YMM/ZMM classes into separate classes for YMM and ZMM. The before/after llvm-exegesis analysis are in the phabricator diff. Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D47721 llvm-svn: 334407
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Guillaume Chatelet authored
Summary: Fixing an unhandled error when calling writeYaml. Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D48022 llvm-svn: 334405
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Sanjay Patel authored
More coverage for the problem noted in D47993 (although these shouldn't be affected by that patch). llvm-svn: 334404
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Pavel Labath authored
It's been reported <http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20180611/559616.html> that template argument deduction for RetryAfterSignal fails if open is not prefixed with "::". This should help us build correctly on those platforms and explicitly specifying the namespace is more correct anyway. llvm-svn: 334403
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Pavel Labath authored
Summary: This kind of functionality is useful to other project apart from clang. LLDB works with version numbers a lot, but it does not have a convenient abstraction for this. Moving this class to a lower level library allows it to be freely used within LLDB. Since this class is used in a lot of places in clang, and it used to be in the clang namespace, it seemed appropriate to add it to the list of adopted classes in LLVM.h to avoid prefixing all uses with "llvm::". Also, I didn't find any tests specific for this class, so I wrote a couple of quick ones for the more interesting bits of functionality. Reviewers: zturner, erik.pilkington Subscribers: mgorny, cfe-commits, llvm-commits Differential Revision: https://reviews.llvm.org/D47887 llvm-svn: 334399
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Roman Lebedev authored
Summary: The idiom recognition seems rather poor. Only the `@bzhi32_d0` produces `v_bfe_u32`. But they all should. This needs to be fixed before D47980 can be re-landed. Reviewers: mareko, bogner, rampitec, arsenm, tstellar, nhaehnle Reviewed By: nhaehnle Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits Tags: #amdgpu Differential Revision: https://reviews.llvm.org/D48005 llvm-svn: 334398
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Roman Lebedev authored
Summary: Lack of that support has taken me by surprise. I need to add (or at least look at) some tests for https://reviews.llvm.org/D47980#1127615, and i don't really fancy doing that by hand. The asm pattern is quite similar to that of x86: https://godbolt.org/g/hfgeds just with `#` replaced with `;` Reviewers: spatel, RKSimon, MaskRay, tstellar, arsenm Reviewed By: arsenm Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, rampitec, bogner, mareko, llvm-commits Tags: #amdgpu Differential Revision: https://reviews.llvm.org/D48001 llvm-svn: 334396
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Guillaume Chatelet authored
Summary: Fix for https://bugs.llvm.org/show_bug.cgi?id=37759. Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D48004 llvm-svn: 334395
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Mikhail Maltsev authored
A recent change https://reviews.llvm.org/D46898 which had no intended behavior change, actually modified the linker flags used when linking the dynamic libraries used by the DynamicLibraryTests unit test. This made the test fail in our testing environment which runs the tests from an NFS share. Prior to D46898 the two libraries used by the test were different (because the library name used to be embedded into the binary), and after the change they became bit-to-bit identical. This causes dlopen to return the same handle when these two libraries are loaded from an NFS share, and the test expects two different handles. This patch reverts the part of D46898 that is responsible for changing the linker flags. Differential Revision: https://reviews.llvm.org/D47469 llvm-svn: 334394
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Clement Courbet authored
This is part of https://reviews.llvm.org/D46356. llvm-svn: 334391
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Clement Courbet authored
Summary: In preparation for D47721. HSW and SNB still define unsupported classes as they are used by KNL and generic models respectively. Reviewers: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D47763 llvm-svn: 334389
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Craig Topper authored
I forgot to git add these in r333812 llvm-svn: 334387
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Craig Topper authored
[X86] Add test files for upgrade of vbmi2 expand load and compress store intrinsics that was done in r334381. llvm-svn: 334386
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Craig Topper authored
llvm-svn: 334384
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Daniel Cederman authored
Summary: When compiling with -fpic, in contrast to -fPIC, use only the immediate field to index into the GOT. This saves space if the GOT is known to be small. The linker will warn if the GOT is too large for this method. Reviewers: jyknight, venkatra Reviewed By: jyknight Subscribers: brad, fedor.sergeev, jrtc27, llvm-commits Differential Revision: https://reviews.llvm.org/D47136 llvm-svn: 334383
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Brock Wyma authored
[CodeView] Omit forward references for unnamed structs and unions Codeview references to unnamed structs and unions are expected to refer to the complete type definition instead of a forward reference so Visual Studio can resolve the type properly. Differential Revision: https://reviews.llvm.org/D32498 llvm-svn: 334382
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Craig Topper authored
We use the target independent intrinsics now. llvm-svn: 334381
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Craig Topper authored
[TableGen] Make better use of std::map::emplace and emplace construct the object in the map rather than moving it into it. Remove a use std::map::find by remembering the return from emplace. llvm-svn: 334380
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Craig Topper authored
[TableGen] Combine two constructors by taking vectors by value instead of trying to support combininations for rvalue and lvalue references. llvm-svn: 334379
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Sanjay Patel authored
This patch started off much more general and ambitious, but it's been a nightmare seeing all the ways x86 vector codegen can go wrong. So the code is still structured to allow extending easily, but it's currently limited in several ways: 1. Only handle cases with an extending load. 2. Only handle cases with a zero constant compare. 3. Ignore setcc with vector bitmask (SetCCWidth != 1) - so AVX512 should be unaffected. The motivating case from PR37427: https://bugs.llvm.org/show_bug.cgi?id=37427 ...is the 1st test, and that shows the expected win - we eliminated the unnecessary intermediate cast. There's a clear regression in the last test (sgt_zero_fp_select) because we longer recognize a 'SHRUNKBLEND' opportunity. I think that general problem is also present in sgt_zero, so I'll try to fix that in a follow-up. We need to match a sign-bit setcc from a sign-extended operand and remove it. Differential Revision: https://reviews.llvm.org/D47330 llvm-svn: 334378
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- Jun 10, 2018
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Craig Topper authored
llvm-svn: 334377
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