Commits · ce246a13ea1d9142df02dd374e80a7bc5313655e · Roger Ferrer / llvm-epi · GitLab

Sep 24, 2014
- [x86] Teach the instruction lowering to add comments describing constant · e7e9c04d
  Chandler Carruth authored Sep 24, 2014
  e7e9c04d
- [x86] More refactoring of the shuffle comment emission. The previous · 7b688c68
  Chandler Carruth authored Sep 24, 2014
  7b688c68
- [x86] Bypass the shuffle mask comment generation when not using verbose · edf50212
  Chandler Carruth authored Sep 24, 2014
  edf50212
- [x86] Hoist the logic for extracting the relevant bits of information · ab8b37a9
  Chandler Carruth authored Sep 24, 2014
  ab8b37a9
- R600/SI: Add new helper isSGPRClassID · 2c419874
  Matt Arsenault authored Sep 24, 2014
  2c419874
- R600/SI: Fix hardcoded and wrong operand numbers. · 262407bc
  Matt Arsenault authored Sep 24, 2014
  262407bc
- R600/SI: Enable named operand table for SALU instructions · 69612d60
  Matt Arsenault authored Sep 24, 2014
  69612d60
- [x86] Start refactoring the comment printing logic in the MC lowering of · 0b682d42
  Chandler Carruth authored Sep 24, 2014
  0b682d42
- R600/SI: Enable selecting SALU inside branches · 744b99b4
  Tom Stellard authored Sep 24, 2014
  744b99b4
- R600/SI: Move PHIs that define SGPRs to the VALU in most cases · deb3f9e6
  Tom Stellard authored Sep 24, 2014
  deb3f9e6
- R600/SI: Fix the FixSGPRLiveRanges pass · 60024a05
  Tom Stellard authored Sep 24, 2014
  60024a05
- R600/SI: Mark EXEC_LO and EXEC_HI as reserved · be507fb5
  Tom Stellard authored Sep 24, 2014
  be507fb5
- R600/SI: Fix SIRegisterInfo::getPhysRegSubReg() · 9a88593e
  Tom Stellard authored Sep 24, 2014
  9a88593e
- R600/SI: Implement VGPR register spilling for compute at -O0 v3 · 96468903
  Tom Stellard authored Sep 24, 2014
  96468903
- [x86] Teach the new vector shuffle lowering to lower v8i32 shuffles with · 9bd10e74
  Chandler Carruth authored Sep 24, 2014
  9bd10e74
- [x86] Fix a really terrible bug in the repeated 128-bin-lane shuffle · fd11815a
  Chandler Carruth authored Sep 24, 2014
  fd11815a
- [x86] Teach the new vector shuffle lowering to lower v4i64 vector · df2e4218
  Chandler Carruth authored Sep 23, 2014
  df2e4218
- AArch64: allow constant expressions for shifted reg literals · 57fd2623
  Jim Grosbach authored Sep 23, 2014
  57fd2623
- [x86] Teach the rest of the 'target shuffle' machinery about blends and · 9a94bd6f
  Chandler Carruth authored Sep 23, 2014
  9a94bd6f
Sep 23, 2014
- R600/SI: Clean up checks for legality of immediate operands · 73ae1cb5
  Tom Stellard authored Sep 23, 2014
  73ae1cb5
- [X86] Make wide loads be managed by AtomicExpand · 6dbbbc28
  Robin Morisset authored Sep 23, 2014
  6dbbbc28
- [Power] Use AtomicExpandPass for fence insertion, and use lwsync where appropriate · 22129969
  Robin Morisset authored Sep 23, 2014
  22129969
- Add AtomicExpandPass::bracketInstWithFences, and use it whenever... · dedef332
  Robin Morisset authored Sep 23, 2014
  dedef332
- [MCJIT] Remove PPCRelocations.h - it's no longer used. · a633a6cd
  Lang Hames authored Sep 23, 2014
  a633a6cd
- Just add a fixme about a possibly faster implementation of some atomic loads on some ARM processors · a7b357fe
  Robin Morisset authored Sep 23, 2014
  a7b357fe
- Fix typo · 4364fef8
  Matt Arsenault authored Sep 23, 2014
  4364fef8
- [x86] Teach the new shuffle lowering's blend functionality to use AVX2's · adcfec99
  Chandler Carruth authored Sep 23, 2014
  adcfec99
- [MCJIT] Nuke MachineRelocation and MachineCodeEmitter. Now that the old JIT is · d5f496d5
  Lang Hames authored Sep 23, 2014
  d5f496d5
- Fix segfault in AArch64 backend with -g and -mbig-endian · c546625c
  Oliver Stannard authored Sep 23, 2014
  c546625c
- Loop instead of individual def's for each GPR. · bd8bd484
  Sid Manning authored Sep 23, 2014
  bd8bd484
- [x86] Teach the vector comment parsing and printing to correctly handle · 40592d2d
  Chandler Carruth authored Sep 23, 2014
  40592d2d
- [x86] Teach the AVX1 path of the new vector shuffle lowering one more · 6d5916a2
  Chandler Carruth authored Sep 23, 2014
  6d5916a2
- [x86] Rename X86ISD::VPERMILP to X86ISD::VPERMILPI (and the same for the · ed5dfff8
  Chandler Carruth authored Sep 22, 2014
  ed5dfff8
- Fix a "typo" from my previous commit. · cecdff65
  Kaelyn Takata authored Sep 22, 2014
  cecdff65
- Silence unused variable warnings in the new stub functions that occur · ba0a1e05
  Kaelyn Takata authored Sep 22, 2014
  ba0a1e05
Sep 22, 2014
- [x86] Stub out the integer lowering of 256-bit vectors with AVX2 · 252debeb
  Chandler Carruth authored Sep 22, 2014
  252debeb
- [FastISel][AArch64] Also allow folding of sign-/zero-extend and shift-left for booleans (i1). · 27e959d7
  Juergen Ributzka authored Sep 22, 2014
  27e959d7
- ms-inline-asm: Fix parsing label names inside bracket expressions · bb6bb07d
  Ehsan Akhgari authored Sep 22, 2014
  bb6bb07d
- Use broadcasts to optimize overall size when loading constant splat vectors... · 7939d722
  Sanjay Patel authored Sep 22, 2014
  7939d722
- Revert "R600/SI: Add support for global atomic add" · 9f73851e
  Tom Stellard authored Sep 22, 2014
  9f73851e