Commits · d056d5decfb593cfc53b421a89075d2063f76ec9 · Roger Ferrer / llvm-epi · GitLab

Feb 19, 2021
- [AArch64][GlobalISel] Run redundant_sext_inreg in the post-legalizer combiner · 8d3442ed
  Jessica Paquette authored Feb 17, 2021
  8d3442ed
- [AArch64] Add some missing Neoverse features · 260f90bb
  Sjoerd Meijer authored Feb 18, 2021
  260f90bb
- [FPEnv][AArch64] Implement lowering of llvm.set.rounding · 2c4f60e4
  Serge Pavlov authored Feb 16, 2021
  2c4f60e4
Feb 18, 2021
- [AArch64][SVE] Add patterns to generate FMLA/FMLS/FNMLA/FNMLS/FMAD · 8bad8a43
  Bradley Smith authored Feb 08, 2021
  8bad8a43
- [AArch64] Allow folding FMUL/FADD into FMA for FP16 types · 5b094bfe
  Bradley Smith authored Feb 12, 2021
  5b094bfe
- [SVE][CodeGen] Expand SVE MULH[SU] and [SU]MUL_LOHI nodes · 0176fecf
  Fraser Cormack authored Feb 17, 2021
  0176fecf
Feb 16, 2021
- [MC][ELF] Support for zero flag section groups · 16af9739
  Petr Hosek authored Jan 31, 2021
  16af9739
- Revert "[AArch64][GlobalISel] Fold constants into G_GLOBAL_VALUE" · 962b73dd
  Jessica Paquette authored Feb 16, 2021
  962b73dd
- [AArch64] Convert CMP/SELECT sign patterns to OR & ASR. · 211147c5
  Florian Hahn authored Feb 16, 2021
  211147c5
- [llvm][Aarch64][SVE] Remove extra fmov instruction with certain literals · e86f9ba1
  David Truby authored Feb 16, 2021
  e86f9ba1
- [SVE] Add support for scalable vectorization of loops with int/fast FP reductions · ba1e150d
  Kerry McLaughlin authored Feb 16, 2021
  ba1e150d
Feb 15, 2021
- GlobalISel: Handle arguments partially passed on the stack · 392e0fcf
  Matt Arsenault authored Feb 07, 2021
  392e0fcf
- [AArch64] Move machine bundle unpacking to PreEmit2 phase. · ca23b2c8
  Florian Hahn authored Feb 15, 2021
  ca23b2c8
- [CostModel]Add cost model for experimental.vector.reverse · b52e6c58
  Caroline Concatto authored Jan 27, 2021
  b52e6c58
- [CodeGen][SelectionDAG]Add new intrinsic experimental.vector.reverse · 2d728bbf
  Caroline Concatto authored Jan 15, 2021
  2d728bbf
- Add ehcont section support · 08086647
  Arlo Siemsen authored Feb 15, 2021
  08086647
Feb 12, 2021
- [AArch64][GlobalISel] Fold constants into G_GLOBAL_VALUE · 61b4702a
  Jessica Paquette authored Feb 11, 2021
  61b4702a
- [GlobalISel] Propagate extends through G_PHIs into the incoming value blocks. · 5d6d9b63
  Amara Emerson authored Jan 24, 2021
  5d6d9b63
- [ObjC][ARC] Use operand bundle 'clang.arc.attachedcall' instead of · ed4718ec
  Akira Hatanaka authored Feb 10, 2021
  ed4718ec
- [Vectorizers][TTI] remove option to bypass creation of vector reduction intrinsics · 79b1b4a5
  Sanjay Patel authored Feb 12, 2021
  79b1b4a5
Feb 11, 2021
- [AArch64] Adding Neon Sm3 & Sm4 Intrinsics · 61cca0f2
  Pengxuan Zheng authored Feb 11, 2021
  61cca0f2
- [AArch64][SVE] Asm: Fix supported immediates for DUP/CPY · 3b4f706a
  Sander de Smalen authored Feb 11, 2021
  3b4f706a
- [AArch64][GlobalISel] Don't perform the mul const combine with G_PTR_ADD · 1514f3b2
  Jessica Paquette authored Feb 10, 2021
  1514f3b2
Feb 10, 2021
- [AArch64][GlobalISel] Perform load/store extended reg folding with optsize · 5f7a4d8d
  Jessica Paquette authored Feb 10, 2021
  5f7a4d8d
- [AArch64][GlobalISel] Fold G_ADD into the cset for G_ICMP · 9283058a
  Jessica Paquette authored Feb 09, 2021
  9283058a
- [AArch64][GlobalISel] Fold selects fed by G_PTR_ADD · 7eee8585
  Jessica Paquette authored Feb 09, 2021
  7eee8585
Feb 09, 2021
- [AArch64][GlobalISel] Allow vector load legalization into 128-bit-wide types · 0e85d634
  Jessica Paquette authored Feb 08, 2021
  0e85d634
- GlobalISel: Fix using wrong calling convention for callees · b72a2365
  Matt Arsenault authored Feb 08, 2021
  b72a2365
- Revert "[ObjC][ARC] Use operand bundle 'clang.arc.rv' instead of explicitly" · de1966e5
  Nico Weber authored Feb 09, 2021
  de1966e5
Feb 08, 2021
- [AArch64][GlobalISel] Support the 'returned' parameter attribute. · ec41ed5b
  Amara Emerson authored Feb 03, 2021
  ec41ed5b
- [AArch64] Use '//' as comment string for MSVC assembly · 71c29b4c
  Martin Storsjö authored Feb 08, 2021
  71c29b4c
- [AArch64AsmParser] Fix type-limits warning for VectorIndex. · 981a38ba
  Sander de Smalen authored Feb 08, 2021
  981a38ba
- AArch64: use a constpool for blockaddress(...) on MachO · c93d50dd
  Tim Northover authored Feb 08, 2021
  c93d50dd
- [CodeGen][AArch64] Add TargetInstrInfo hook to modify the TailDuplicateSize default threshold · cd880442
  Nicholas Guy authored Jan 28, 2021
  cd880442
Feb 06, 2021
- [AArch64] Correct some tablegen operand types. NFC · 0f435a54
  David Green authored Feb 06, 2021
  
  0f435a54
Feb 05, 2021
- [ObjC][ARC] Use operand bundle 'clang.arc.rv' instead of explicitly · 4a64d8fe
  Akira Hatanaka authored Jan 25, 2021
  4a64d8fe
- Revert "[ObjC][ARC] Use operand bundle 'clang.arc.rv' instead of explicitly" · 2fbbb18c
  Akira Hatanaka authored Feb 05, 2021
  2fbbb18c
- [ObjC][ARC] Use operand bundle 'clang.arc.rv' instead of explicitly · 3fe3946d
  Akira Hatanaka authored Jan 25, 2021
  3fe3946d
- AArch64LowerHomogeneousPrologEpilog.cpp - fix Wdocumentation warning. NFCI. · ba99ac37
  Simon Pilgrim authored Feb 05, 2021
  
  ba99ac37
- [AArch64][SVE] Coalesce ptrue instrinsic calls where possible · 3d257fde
  Joe Ellis authored Feb 05, 2021
  3d257fde