Commits · d20bf5a7258d4b6a7f017a81b125275dac1aa166 · Roger Ferrer / llvm-epi · GitLab

May 27, 2020
- [X86] Assemble movzb 1280(%rbx, %r12), %r12 after D80608 · 5b4cd2d4
  Fangrui Song authored May 27, 2020
  5b4cd2d4
- [X86][llvm-mc] Make the suffix matcher more accurate. · 6565b585
  Wang, Pengfei authored May 27, 2020
  6565b585
May 25, 2020
- [AMDGPU][MC][GFX8+] Enabled clamp for v_add_u16, v_sub_u16 and v_subrev_u16 · 77aec3b4
  Dmitry Preobrazhensky authored May 25, 2020
  77aec3b4
- Add AIX to the test macro-same-context XFAIL list · c8b7c73c
  Shuhong Liu authored May 25, 2020
  c8b7c73c
- [MCDwarf] Delete unneeded DW_AT_unspecified_parameters · 1b79509f
  Fangrui Song authored May 24, 2020
  
  1b79509f
- [MCDwarf] Delete unneeded DW_AT_prototyped for DW_TAG_label · 20e9fc55
  Fangrui Song authored May 24, 2020
  
  20e9fc55
May 24, 2020
- [PowerPC] Add some InstAlias definitions · 86e3abc9
  Kang Zhang authored May 24, 2020
  86e3abc9
May 22, 2020
- [PowerPC] Add support for vmsumudm · a28e9f12
  Ahsan Saghir authored May 22, 2020
  a28e9f12
- Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC" · 5a8db275
  Jon Roelofs authored May 22, 2020
  5a8db275
- [AMDGPU][MC][GFX8+] Enabled clamp for v_mul_i32_i24_e64 and v_mul_u32_u24_e64 · 933ebc40
  Dmitry Preobrazhensky authored May 22, 2020
  933ebc40
May 21, 2020
- [llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC · 183d6af0
  Jon Roelofs authored May 15, 2020
  183d6af0
May 20, 2020
- [Hexagon] pX.new cannot be used with p3:0 as producer · cfba1a96
  Brian Cain authored May 15, 2020
  cfba1a96
May 19, 2020
- [WebAssembly] Implement i64x2.mul and remove i8x16.mul · 3181273b
  Thomas Lively authored May 19, 2020
  3181273b
May 18, 2020
- [AMDGPU][MC] Corrected branch relocation handling to detect undefined labels · f997370d
  Dmitry Preobrazhensky authored May 18, 2020
  f997370d
May 17, 2020
- [LLVM][AVR] Support for R_AVR_6 fixup · 1335737e
  Dylan McKay authored May 17, 2020
  1335737e
May 13, 2020
- Clang crash targeting ARM or Thumb when assembling a prel31 relocation variant · 410644fb
  Simon Wallis authored May 13, 2020
  410644fb
- [AMDGPU][MC][GFX9+] Enabled clamp for v_add_i32 and v_sub_i32 · 18a5428e
  Dmitry Preobrazhensky authored May 13, 2020
  18a5428e
- [mips] Fix typo in FileCheck directives - replace \0xa0 char by space. NFC · 524457ed
  Simon Atanasyan authored May 13, 2020
  524457ed
May 12, 2020
- [arm] Add big-endian version of pcrel fixups for adr instructions · fc373522
  Dimitry Andric authored May 12, 2020
  fc373522
- [WebAssembly] Implement pseudo-min/max SIMD instructions · 3d49d1cf
  Thomas Lively authored May 12, 2020
  3d49d1cf
May 08, 2020
- [X86] Add assembler support for {vex} prefix to match GNU as. · adf3b8e3
  Craig Topper authored May 08, 2020
  adf3b8e3
May 06, 2020
- [X86] Remove support for Y0 constraint as an alias for Yz in inline assembly. · 16c800b8
  Craig Topper authored May 06, 2020
  16c800b8
- [RISCV][NFC] Add more constant materialization tests · a3e6e624
  Luís Marques authored May 06, 2020
  a3e6e624
- [AMDGPU][MC][GFX9+] Enabled 21-bit signed offsets for SMEM instructions · 5998bacc
  Dmitry Preobrazhensky authored May 06, 2020
  5998bacc
- [PowerPC] Fix missing GOT indirect variant kind · 7d507ff5
  Stefan Pintilie authored May 06, 2020
  7d507ff5
May 05, 2020
- [RISCV] Update debug scratch register names · 85aff8a4
  Pengxuan Zheng authored Apr 23, 2020
  85aff8a4
May 02, 2020
- [WebAssembly] Renumber SIMD opcodes · e0f52842
  Thomas Lively authored Apr 30, 2020
  e0f52842
Apr 30, 2020
- [WebAssmebly] Add support for defined wasm globals in MC and lld · 0a6c4d8d
  Sam Clegg authored Apr 29, 2020
  0a6c4d8d
Apr 29, 2020
- [SystemZ] Allow specifying plain register numbers in AsmParser · e1de2773
  Ulrich Weigand authored Apr 29, 2020
  e1de2773
- [AArch64] Remove inexistent system register ERXTS_EL1 · d3dc4c32
  Victor Campos authored Apr 15, 2020
  d3dc4c32
Apr 28, 2020
- [PowerPC] Fix downcast from nullptr for target streamer · 500b4ad5
  Ng Zhi An authored Apr 28, 2020
  500b4ad5
Apr 27, 2020
- [llvm-objdump] Print target address with evaluateMemoryOperandAddress() · 3c9c9c17
  Fangrui Song authored Apr 23, 2020
  3c9c9c17
Apr 24, 2020
- [RISCV] Add instruction definition for dret · 79702dd3
  Pengxuan Zheng authored Apr 24, 2020
  79702dd3
- [AArch64] Allow PAC mnemonics in the HINT space with PAC disabled · d4e7b000
  Pablo Barrio authored Mar 10, 2020
  d4e7b000
- [AArch32] Armv8.6a Matrix Mul Assembly Parsing Support · 659ca502
  Luke Geeson authored Apr 09, 2020
  659ca502
- [AArch64] Armv8.6-A Mat Mul SVE Assembly · e7146838
  Luke Geeson authored Apr 09, 2020
  e7146838
- [AArch64] Armv8.6-a Matrix Mult Assembly + Intrinsics · 832cd749
  Luke Geeson authored Apr 09, 2020
  832cd749
Apr 22, 2020
- [ARM] Replace arm vendor with none. NFC · eecba950
  David Green authored Apr 22, 2020
  
  eecba950
- [ARM][MC][Thumb] Recommit: Revert relocation for some pc-relative fixups. · 3df81352
  Mark Murray authored Apr 20, 2020
  3df81352
- [AMDGPU] Fix test failures caused by dbdffe3e . · 1f32e736
  Jay Foad authored Apr 22, 2020
  
  1f32e736